Semiconductor Memory Device With Auxiliary Electrode Storage Capacitor
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing DRAM semiconductor memory devices have complex structures and low integration, leading to limited application due to high leakage current and reduced storage performance.
Innovation Solution
A semiconductor memory device with a transistor structure that includes a gate electrode, an auxiliary electrode, and a semiconductor layer, where the auxiliary electrode is electrically connected to the drain electrode and acts as a storage capacitor, reducing leakage current and enhancing integration without additional capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional DRAM structure with separate capacitor is used, then storage function is achieved, but device complexity increases and integration decreases
Solution Approach 1:
The patent merges the capacitor function into the transistor structure by using the drain electrode as one plate of the storage capacitor and adding an auxiliary electrode as the other plate. This integration eliminates the need for a separate capacitor structure, reducing device complexity while maintaining the storage function through the形成的 storage capacitor between the auxiliary electrode and drain electrode.
Solution Approach 2:
The drain electrode serves dual functions: as the drain of the transistor and as one plate of the storage capacitor. The auxiliary electrode is introduced to serve as the other plate of the storage capacitor while also being positioned to control the channel. This multi-functionality reduces the number of separate components needed in the memory cell.
2Reliability
If conventional transistor structure is used, then basic switching function is achieved, but leakage current increases
Solution Approach 1:
The auxiliary electrode acts as an intermediary element that provides additional control over the channel. By positioning the auxiliary electrode around the outer sidewall of the gate electrode and connecting it to the drain, the structure enables better electrostatic control and reduces leakage current through the formed storage capacitor effect, while adding only one additional electrode rather than a complete separate capacitor structure.
3Reliability
If additional capacitor is added to reduce leakage, then storage performance improves, but device complexity increases
Solution Approach 1:
Instead of adding a completely separate capacitor structure, the patent merges the capacitor function into the existing transistor architecture. The storage capacitor is formed using the drain electrode and auxiliary electrode, which are integrated into the transistor structure, thereby improving storage performance without proportionally increasing device complexity.
Solution Approach 2:
The auxiliary electrode is positioned around the outer sidewall of the gate electrode, nesting the capacitor structure within the transistor structure. This nested arrangement allows the storage capacitor to be formed in the same footprint as the transistor, improving integration density while reducing the need for additional separate capacitor components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution simplifies the memory cell structure, reduces leakage current, and improves integration and storage density by using the auxiliary electrode as a storage capacitor, enabling more compact and efficient data storage.
Implementation Method 1
a node capacitor of the auxiliary electrode with the drain electrode forming a storage capacitor
Data Source
AI summary
A semiconductor memory device and a manufacturing method thereof, a reading/writing method, an electronic device and a memory circuit are provided. A transistor is provided in each memory cell in the semiconductor memory device. A gate electrode and an auxiliary electrode are provided in the transistor, and the auxiliary electrode is electrically connected to a drain electrode. During a writing operation, a first voltage is applied to the gate electrode through a word line, and an electrical signal is applied to a source electrode through a bit line according to the external input data. During a reading operation, a second voltage is applied to the auxiliary electrode through the word line by using the influence of the voltage on the auxiliary electrode on the threshold voltage of the transistor (the size of the second voltage is between the threshold voltage of the transistor when storing “1” and the threshold voltage of the transistor when storing “0”), and then the data is read by detecting the size of the output current of the field effect transistor.


