Auxiliary Emitter Wiring Layout for Parallel Semiconductor Modules
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor modules with parallel-connected switching elements face gate oscillation issues due to increased inductance, which can lead to voltage breakdown and noise generation, and existing solutions like chip resistors cause delays and cost increases.
Innovation Solution
A semiconductor module design with an auxiliary emitter wiring system featuring discrete wiring portions with inductance less than 10% of the common wiring portion, connecting parallel switching elements to suppress gate oscillation and maintain stability without increasing turn-on loss or costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple DCB substrates are connected in parallel to increase current capacity, then the current capacity of the semiconductor module is enlarged, but gate oscillation is more likely to occur due to increased inductance
Solution Approach 1:
The auxiliary emitter wiring is segmented into a common wiring portion and multiple discrete wiring portions, each connecting to different switching elements. This segmentation allows independent optimization of each wiring path's inductance while maintaining overall system performance
Solution Approach 2:
The discrete wiring portions are designed with specifically controlled inductance values (less than 10% of the common wiring portion) to create non-uniform inductance distribution. This local quality control suppresses gate oscillation at each switching element while maintaining high current capacity through parallel connection
2Reliability
If a chip resistor is connected to the gate wiring to suppress gate oscillation, then gate oscillation is suppressed, but delay occurs in gate signal rising, switching time lengthens, and turn-on loss increases
Solution Approach 1:
The invention extracts the oscillation suppression function from the gate wiring and relocates it to the auxiliary emitter wiring. By controlling the inductance of discrete wiring portions in the auxiliary emitter wiring, gate oscillation is suppressed without adding resistive elements that would increase turn-on loss
Solution Approach 2:
The auxiliary emitter wiring with controlled inductance acts as an intermediary element that mediates between the parallel-connected switching elements and the main current path. It suppresses oscillation through inductance matching rather than through resistive damping
3Reliability
If the inductance of the auxiliary emitter wiring is reduced to suppress gate oscillation, then gate oscillation is suppressed, but the complexity of wiring design increases
Solution Approach 1:
The invention specifies a quantitative parameter relationship (discrete wiring inductance less than 10% of common wiring inductance) that provides clear design guidelines. This parameter-based approach simplifies the design process by providing explicit criteria rather than requiring complex iterative optimization
Data Source
AI summary
A semiconductor module, including: a first circuit board and a second circuit board respectively have a first switching element and a second switching element located thereon, each of the first and second switching elements having an emitter electrode; a first connecting portion and a second connecting portion respectively electrically connected to the emitter electrodes of the first and second switching elements over the first and second circuit boards; an auxiliary emitter terminal; and an auxiliary emitter wiring electrically connected to the auxiliary emitter terminal. The auxiliary emitter wiring includes: a branch point, a common wiring portion which connects the auxiliary emitter terminal and the branch point, and a first discrete wiring portion and a second discrete wiring portion which connect the branch point respectively to the first and second connecting portions, and which each have an inductance smaller than 10 percent of an inductance of the common wiring portion.