Auxiliary Patterns for Capacitance Stability in Semiconductor Devices

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Solution Overview

Problem

Misalignment during the patterning process of conductive layers in semiconductor devices can lead to a decrease in the overlapping area between upper and lower conductive layers, resulting in reduced capacitance and altered electrical characteristics, which affects the quality of display panels, particularly in liquid crystal and organic light emitting display devices.

Innovation Solution

A semiconductor device design featuring a substrate with a first conductive layer having a main pattern and symmetrical auxiliary patterns, an insulating layer, and a second conductive layer that overlaps the main and auxiliary patterns, ensuring consistent overlap area and capacitance even with misalignment during the lithography and etching processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional patterning process is used for conductive layers, then manufacturing process is simple, but misalignment occurs reducing overlapping area and capacitance

Engineering Contradiction:
Improvealignment precisionVSAvoidpattern structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The first conductive layer is divided into a main pattern and multiple auxiliary patterns. The auxiliary patterns are positioned at specific locations around the main pattern to compensate for misalignment. This segmentation allows the overlapping area to be maintained even when misalignment occurs during patterning, as the auxiliary patterns ensure sufficient overlap with the second conductive layer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The auxiliary patterns are pre-positioned in the first conductive layer at locations that anticipate potential misalignment. By placing these patterns in advance, the design ensures that even if the second conductive layer shifts during patterning, there will still be adequate overlapping area to maintain capacitance and electrical characteristics.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If overlapping area between conductive layers is reduced due to misalignment, then manufacturing tolerance is relaxed, but capacitance and electrical characteristics deteriorate

Engineering Contradiction:
Improveelectrical characteristics stabilityVSAvoidoverlapping area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Different regions of the first conductive layer serve different functions. The main pattern provides the primary electrical connection, while the auxiliary patterns specifically serve to maintain overlapping area and capacitance. This local differentiation ensures that even if misalignment reduces the overall overlapping area, the auxiliary patterns locally compensate to maintain electrical characteristics.

Inventive Principle:
Principle #3Local quality

3Area of moving object

If capacitance of storage capacitor decreases, then device size is reduced, but display quality and color uniformity deteriorate

Engineering Contradiction:
Improvedevice sizeVSAvoiddisplay quality
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

Instead of increasing capacitance by enlarging the capacitor in one dimension, the solution uses auxiliary patterns arranged in multiple dimensions around the main pattern. This multi-dimensional arrangement maintains capacitance without significantly increasing the overall device footprint, thus preserving display quality while controlling device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10121803B2Semiconductor device having auxiliary patterns
Publication Date: 2018.11.06 SAMSUNG DISPLAY CO LTD
  • US10121803B2 patent drawing
  • US10121803B2 patent drawing
  • US10121803B2 patent drawing

AI summary

A semiconductor device includes a substrate, a first conductive layer on the substrate and including a main pattern, and substantially symmetrical auxiliary patterns extending from two sides of the main pattern, an insulating layer on the substrate and the first conductive layer, and a second conductive layer on the insulating layer and overlapping at least a portion of the main pattern and the auxiliary patterns.