Auxiliary Power Rail Control for Ultra-Low Standby Consumption
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Solution Overview
Problem
Computer systems operating under the ACPI specification face challenges in reducing power consumption in off-states to comply with mandates like the European Union's requirement of drawing one watt or less, particularly in achieving low power draw while maintaining wake functionality.
Innovation Solution
The implementation of a power control circuit that selectively manages the main and auxiliary power output signals, transitioning between operational states such as S0, S3, S5, and a second powered-off state to minimize power usage while maintaining wake capabilities, using a combination of field effect transistors, latch circuits, and BIOS-driven signals to manage power rails and isolate auxiliary power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the auxiliary power rail remains powered in the S5 soft-off state to enable wake functions, then wake functionality is maintained, but power consumption exceeds one watt
Solution Approach 1:
The patent segments the power management into two distinct powered-off states: a first state (S5) with auxiliary power enabled for wake functions, and a second state with auxiliary power disabled for minimal consumption. The power control circuit selectively transitions between these states based on system requirements, allowing wake functionality when needed while achieving ultra-low power consumption when full wake capability is not required.
Solution Approach 2:
The patent implements dynamic power management where the auxiliary power rail is selectively enabled or disabled based on system state. The power control circuit dynamically transitions between the first powered-off state (with auxiliary power) and the second powered-off state (without auxiliary power), allowing the system to adapt power consumption levels to actual wake requirements.
2Use of energy by moving object
If the auxiliary power rail is completely disabled to achieve one watt or less power draw, then power consumption meets regulatory requirements, but wake functions cannot be activated
Solution Approach 1:
The patent creates two distinct powered-off states with different power configurations. The second state disables the auxiliary power rail entirely to achieve one watt or less consumption, while the first state keeps it enabled for wake functions. This segmentation allows the system to meet regulatory requirements in the second state while preserving wake capability in the first state.
Solution Approach 2:
The patent changes the power supply parameter of the auxiliary power rail between two discrete states: enabled (first powered-off state) and disabled (second powered-off state). This parameter change allows the system to switch between wake-capable mode and ultra-low power mode, satisfying both functional requirements and regulatory constraints.
3Use of energy by moving object
If multiple power states are implemented to balance power consumption and wake functionality, then both requirements can be met, but system complexity increases
Solution Approach 1:
The power control circuit is designed to perform multiple functions: it manages transitions between operational states (S0, S3, S5), controls the auxiliary power rail, monitors system state, and enables wake function activation. This multi-functional design consolidates what could be multiple separate control mechanisms into a single integrated circuit, managing complexity while achieving the dual goals of low power consumption and wake functionality.
Data Source
AI summary
Computer system powered-off state auxiliary power rail control. At least some of the illustrative embodiments are systems configured to have: a first powered-off state in which the main output power signal is deactivated within the power supply and the auxiliary power output signal is active and coupled to an auxiliary power rail of the printed circuit board; and a second powered-off state in which the main power output signal is deactivated and the auxiliary power output signal is active and decoupled from the auxiliary power rail of the printed circuit board.


