Avalanche Diode Noise Reduction via Overlapping Semiconductor Regions
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Solution Overview
Problem
Conventional light detection apparatuses face challenges in reducing noise while maintaining the operating voltage for avalanche multiplication, as the strong electric field in PN junction regions can lead to pseudo signals and increased noise, and lowering impurity density to reduce noise increases the operating voltage.
Innovation Solution
The light detection apparatus features a semiconductor substrate with a specific structure of semiconductor regions, including N-type and P-type regions, where the impurity density is optimized to reduce the strong electric field and noise, while maintaining the operating voltage, by forming overlapping regions that control the electric field and avalanche multiplication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If impurity density is lowered to reduce noise, then noise is reduced, but operating voltage increases
Solution Approach 1:
The patent applies local quality by creating distinct semiconductor regions with different impurity densities at specific locations. The first semiconductor region has a first impurity density while the second semiconductor region has a second impurity density, allowing different areas to have optimized properties for their specific functions - reducing noise in avalanche multiplication regions while maintaining adequate carrier generation in other regions
Solution Approach 2:
The patent transitions from a conventional two-layer PN junction structure to a more complex multi-region structure by adding depth dimensionality. The first semiconductor region is disposed at a first depth and the second semiconductor region at a second depth, creating a vertically stratified structure that enables independent optimization of different functional zones within the avalanche diode
2Measurement precision
If strong electric field is maintained for avalanche multiplication, then detection capability is improved, but pseudo signals and noise increase
Solution Approach 1:
The patent creates localized high electric field regions specifically where needed for avalanche multiplication by controlling impurity density distribution. The first semiconductor region with its specific impurity density creates the necessary strong electric field for photon detection, while the second semiconductor region with different impurity density suppresses tunneling effects and pseudo signal generation in adjacent areas
Solution Approach 2:
The second semiconductor region acts as an intermediary structure between the high electric field avalanche region and the external circuit. This intermediate region with its specific impurity density serves as a buffer that maintains the strong electric field needed for detection while filtering out and reducing pseudo signals and noise before they reach the output
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces noise and maintains the operating voltage, enhancing the dynamic range and accuracy of light detection without increasing the voltage required for avalanche multiplication.
Implementation Method 1
The avalanche diode causes avalanche multiplication by the first and third semiconductor regions
Implementation Method 2
a light detection apparatus for performing photoelectric conversion
Data Source
AI summary
An avalanche diode includes a first semiconductor region of a first conductivity type disposed in a first depth, a second semiconductor region disposed in a second depth deeper than the first depth with respect to a first surface, in contact with the first semiconductor region, and a third semiconductor region disposed in a third depth deeper than the second depth with respect to the first surface, in contact with the second semiconductor region. Avalanche multiplication is caused by the first and third semiconductor regions. The first, second, and third semiconductor regions overlap in plan view. A potential difference between the first and second semiconductor regions with respect to main charge carriers of a semiconductor region of the first conductive type is smaller than a potential difference between the first and third semiconductor regions with respect to the charge carriers.