Avalanche Photodiode Doping Profile for Leakage Current Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Avalanche photodiodes face challenges in suppressing leakage current while maintaining low anode resistance, leading to high dark count rates due to recombination current at defects and segregated impurities, which deteriorate noise tolerance in Geiger mode operation.

Innovation Solution

The design incorporates a first semiconductor layer of a first conductivity type, a second semiconductor layer of opposite conductivity type, a third semiconductor layer with higher impurity concentration, and a fourth semiconductor layer with a concentration higher than the first but lower than the third, along with a polysilicon electrode with an insulating film, to control the depletion layer and reduce dark count rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a highly-doped P+ diffusion and lowly-doped P-well are used as the anode to increase the depletion layer width and suppress tunnel current, then leakage current is reduced, but the electric field intensity becomes low immediately below the P-well and avalanche amplification region is narrowed

Engineering Contradiction:
Improveleakage currentVSAvoidavalanche amplification region
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by creating a P- layer specifically in the region immediately below the P-well anode, where the local electric field intensity needs to be increased. This localized doping modification allows the depletion layer to expand vertically in the critical region without affecting the overall anode structure, thereby increasing electric field intensity and avalanche amplification region while maintaining the low leakage current characteristics provided by the highly-doped P+ diffusion.

Inventive Principle:
Principle #3Local quality

2Reliability

If the concentration of the fourth semiconductor layer is increased to lower the anode resistance, then anode resistance is reduced, but recombination current at defects and segregated impurities increases, deteriorating dark count rate

Engineering Contradiction:
Improveanode resistanceVSAvoidrecombination current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies parameter changes by precisely controlling the impurity concentration of the P- layer to be higher than the P-well but lower than the P+ diffusion layer. This intermediate concentration parameter allows the P- layer to provide sufficient charge carriers to reduce anode resistance while avoiding the formation of excessive recombination centers that would occur with higher doping concentrations, thus maintaining low dark count rate.

Inventive Principle:
Principle #35Parameter changes

3Stress or pressure

If a second semiconductor layer is formed immediately below the first semiconductor layer to increase electric field intensity, then electric field intensity is increased, but recombination current at defects caused by dangling bond at the Si-SiO2 interface deteriorates dark count rate

Engineering Contradiction:
Improveelectric field intensityVSAvoidrecombination current at interface defects
Core Design Contradiction:
Stress or pressureVSObject-generated harmful factors

Solution Approach 1:

The patent applies the intermediary principle by introducing the P- layer as an intermediate semiconductor layer between the P-well anode and the highly-doped P+ diffusion layer. This intermediate layer serves as a mediator that increases electric field intensity in the critical region while being positioned away from the Si-SiO2 interface, thereby avoiding the recombination current problems associated with interface defects and dangling bonds.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses leakage and achieves good dark count rate characteristics by preventing the depletion layer from spreading beyond the fourth semiconductor layer, thereby stabilizing the amplification factor and reducing noise.

Implementation Method 1

an avalanche photodiode using the avalanche effect of a photodiode has been used as a light-receiving device that detects faint light at high speed

Methodology Applied
Scientific EffectAvalanche effect: Avalanche Breakdown

Implementation Method 2

Because an avalanche phenomenon is caused in an avalanche photodiode in Geiger mode even in response to single photon incidence

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS11081612B2Avalanche photodiode
Publication Date: 2021.08.03 SHARP FUKUYAMA LASER CO LTD
  • US11081612B2 patent drawing
  • US11081612B2 patent drawing
  • US11081612B2 patent drawing

AI summary

An avalanche photodiode includes: a first semiconductor layer of a first conductivity type formed on a substrate of the first conductivity type; a second semiconductor layer of a second conductivity type formed under the first semiconductor layer; a third semiconductor layer of the first conductivity type formed in a shallow portion of the first semiconductor layer on the substrate, the third semiconductor layer having a higher concentration than an impurity concentration of the first semiconductor layer; a fourth semiconductor layer of the first conductivity type formed in a region in the first semiconductor layer immediately below the third semiconductor layer; a first contact electrically connected to the first semiconductor layer; and a second contact electrically connected to the second semiconductor layer. An impurity concentration of the fourth semiconductor layer is higher than that of the first semiconductor layer and is lower than that of the third semiconductor layer.