Avalanche Photodiode Side Dark Current Suppression

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Si-based avalanche photodiodes face challenges in suppressing side dark current due to band bending caused by Fermi level pinning, which affects the device's reliability and signal-to-noise ratio, despite the use of electric field constricting structures.

Innovation Solution

The method involves forming a p-type semiconductor layer on a transfer substrate with a smaller n-type semiconductor layer area than the multiplication layer, and processing the light absorption, electric field control, and multiplication layers into a mesa shape to control the electric field and reduce electron movement to the device surface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an electric field constricting structure using ion implantation or selective diffusion is used to suppress side dark current, then the reliability deteriorates due to Fermi level pinning causing band bending, but the manufacturing complexity increases

Engineering Contradiction:
Improveside dark current suppressionVSAvoidelectric field constricting structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the geometric parameters of the n-type semiconductor layer by forming it with a smaller area than the multiplication layer, creating side surfaces that modify the electric field distribution and suppress band bending at the device surface, thereby reducing side dark current without complex additional structures

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the semiconductor structure into distinct layers with different horizontal dimensions - the n-type semiconductor layer has a smaller area than the multiplication layer, creating exposed side surfaces that serve as a separate functional region for electric field control and dark current suppression

Inventive Principle:
Principle #1Segmentation

2Reliability

If the n-type semiconductor layer area is reduced to suppress side dark current, then the reliability improves, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveside dark current suppressionVSAvoidn-type semiconductor layer area control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary patterning of the n-type semiconductor layer to define its smaller area before forming the multiplication layer, establishing the geometric configuration that will suppress side dark current while allowing subsequent layers to be formed with standard precision requirements

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses the generation of side dark current, enhancing the reliability and sensitivity of Si-based avalanche photodiodes while allowing for high-speed operation and cost-effective mass production.

Implementation Method 1

The light-receiving device converts incident light to an electric current

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Implementation Method 2

photoelectrons generated inside the device are collided against lattice atoms by being accelerated under a high electric field, thereby ionizing the lattice atoms and amplifying carriers

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Data Source

PatentEP3680941B1Avalanche photodiode and method for manufacturing same
Publication Date: 2022.09.28 NIPPON TELEGRAPH & TELEPHONE CORP
  • EP3680941B1 patent drawingFigure 1A~1C
  • EP3680941B1 patent drawingFigure 1D~1E
  • EP3680941B1 patent drawingFigure 1F~1G

AI summary

An n-type semiconductor layer (102), a multiplication layer (103), an electric field control layer (104), a light absorption layer (105), and a p-type semiconductor layer (106) are formed on a growth substrate (101), and the p-type semiconductor layer (106) is adhered on a transfer substrate (107). After that, the growth substrate (101) is removed, and the n-type semiconductor layer (102) is processed to have an area smaller than that of the multiplication layer (103) .