Avionics Display Architecture Independent Processing Channels
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Solution Overview
Problem
The existing avionics display systems in aircraft, such as the Boeing 787, have limited growth capacity and are based on outdated technology, consuming excessive space and power, with the Display and Crew Alerting system consuming a significant number of General Purpose Modules and requiring redundant hardware for high integrity and availability.
Innovation Solution
A high integrity, high availability avionics display architecture featuring display processing computers with independent processing channels and integrity feedback interfaces, which offloads display processing from cabinets to new hardware, reducing resource consumption and leveraging modern components to minimize size, weight, and power usage, while maintaining or exceeding current integrity and availability standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Display and Crew Alerting system uses traditional General Purpose Modules and Graphics Generation Modules in the Common Core System, then the system can provide display and alerting functions, but the system consumes excessive space (5 of 16 GPMs) and power, and has limited growth capacity
Solution Approach 1:
The system is segmented into independent Display Processing Computers (DPCs) that are physically separated from the Common Core System cabinets. Each DPC is a standalone unit with its own processing channels, I/O sections, and graphics sections, allowing it to operate independently and reducing the resource burden on the main system while maintaining high integrity and availability through redundant independent processing channels
Solution Approach 2:
The display processing functionality is extracted from the Common Core System's General Purpose Modules and Graphics Generation Modules. The DPCs are removed from the cabinet-based IMA architecture and deployed as separate units, freeing up cabinet resources (5 of 16 GPMs) and reducing overall power consumption while maintaining the required display and alerting functions
2Reliability
If the system uses older graphics generation hardware from the late 1990s, then the display system can function, but it requires more space and power than modern electronics
Solution Approach 1:
The system transitions from late 1990s technology to modern electronics by implementing DPCs with contemporary processors, memory, and graphics hardware. This parameter change in technology generation reduces the space and power requirements significantly while maintaining and improving display functionality through modern display technologies including touch displays and HUDs
3Reliability
If the system implements high integrity and availability through redundant hardware in the Common Core System, then the required reliability can be achieved, but the device complexity and hardware support requirements increase
Solution Approach 1:
The redundant hardware is segmented into independent DPC units rather than being consolidated within the Common Core System. Each DPC contains independent processing channels (at least two independent lanes per channel) that can operate autonomously, providing fault tolerance without requiring complex interconnections and hardware support within a single cabinet system
Solution Approach 2:
The system uses independent copying of processing channels where each DPC has duplicate processing capabilities that can operate independently. This copying approach provides redundancy for fault tolerance while simplifying hardware support compared to complex redundant architectures, as each DPC is a complete functional copy that can be independently managed and replaced
Data Source
AI summary
A high integrity, high availability avionics display architecture for an avionics display system. The architecture includes a plurality of display processing computers (DPC) and a plurality of display integrity feedback interfaces. Each DPC includes at least two independent processing channels. Each independent processing channel includes at least two independent lanes. Each independent lane includes an I/O section and a processor section. Furthermore, each independent processing channel comprises an operative graphics section. At least one of the independent lanes provides a critical display function that provides commands to the graphics section to drive a display signal to displays of the avionics system. A number of display integrity feedback interfaces from the displays of the avionics display system provide integrity by allowing the integrity monitor functions to detect faults within the display signals and/or originating from the displays.