Avionics Software Framework for Deterministic Multi-Core Bus Bandwidth Allocation
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Solution Overview
Problem
Exploiting multi-core processors in avionics systems for hard real-time safety-critical applications is challenging due to unpredictable resource sharing and complex timing analysis, leading to inefficiencies and increased design complexity, particularly with the emergence of multi-core processors which can result in non-deterministic architectures and computational resource waste.
Innovation Solution
An avionics system software framework that manages bus bandwidth by assigning shares among cores and using performance counters to monitor and adjust access to ensure deterministic behavior, where cores that exceed their assigned bandwidth are idled to maintain predictability and prevent resource overruns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multi-core processors are used to increase computing power, then processing capability is improved, but timing predictability deteriorates due to resource sharing and cache coherency
Solution Approach 1:
The patent segments the multi-core processor system into isolated partitions, where each partition is assigned to a specific safety-critical application. This segmentation prevents inter-task conflicts and cache coherency issues between different applications, maintaining timing predictability while utilizing multiple cores for parallel processing of independent tasks.
Solution Approach 2:
The patent implements local quality by providing dedicated resources (memory, bus bandwidth, cache) to each partition based on its specific requirements. Each partition receives guaranteed local resources that are not shared with other partitions, ensuring deterministic behavior for safety-critical applications while allowing non-critical applications to use remaining resources.
2Productivity
If resource sharing is implemented among cores, then efficiency is improved, but complexity of timing analysis increases
Solution Approach 1:
The patent introduces an intermediary mechanism (partition manager and resource allocation system) that mediates resource sharing between cores. This intermediary abstracts the complexity of resource sharing by implementing controlled access protocols and resource reservation, allowing efficient resource utilization while maintaining analyzable timing behavior through defined access patterns.
3Reliability
If strict isolation is applied to ensure determinism, then timing predictability is improved, but resource utilization efficiency deteriorates
Solution Approach 1:
The patent implements dynamic resource allocation where partitions can adaptively use available resources based on current system state and priority levels. Safety-critical partitions maintain strict isolation guarantees, while non-critical partitions can dynamically access unused resources from other partitions, achieving both determinism for critical tasks and high efficiency overall through dynamic resource sharing.
Data Source
AI summary
An avionics system comprising a central processing unit to implement one or more hard real-time safety-critical applications, the central processing unit comprises a multi-core processor with a plurality of cores, an avionics system software executable by the multi-core processor, a memory, and a common bus though which the multi-core processor can access the memory; the avionics system is characterized in that the avionics system software is designed to cause, when executed, the cores in the multi-core processor to access the memory through the common bus by sharing bus bandwidth according to assigned bus bandwidth shares.