AXI-CAPI Adapter Protocol Conversion
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Solution Overview
Problem
The coherent accelerator processor interface (CAPI) protocol is not compatible with the advanced extensible interface (AXI) used by many accelerators, limiting high-performance communication and memory sharing in heterogeneous computing architectures.
Innovation Solution
An AXI-CAPI adapter is introduced, which includes a hierarchy of hardware elements to convert CAPI signals into different types of AXI signals, enabling communication between a power service layer and an AXI-compatible accelerator, thereby abstracting the CAPI protocol and allowing AXI-compatible accelerators to utilize the benefits of CAPI without requiring understanding of the CAPI interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CAPI protocol is used for high-performance communication between CPU and accelerator, then communication performance and memory sharing capability are improved, but compatibility with AXI-based accelerators is lost
Solution Approach 1:
The patent introduces a protocol conversion interface that acts as an intermediary between the CAPI protocol and AXI protocol. This interface receives CAPI protocol signals from the CPU, converts them to AXI protocol signals, and transmits them to AXI-based accelerators. This mediator enables high-performance CAPI communication while maintaining compatibility with AXI-based accelerators, resolving the contradiction between communication performance and protocol compatibility.
2Adaptability or versatility
If protocol conversion interface is introduced to enable CAPI-AXI communication, then compatibility with AXI accelerators is improved, but system complexity increases
Solution Approach 1:
The patent extracts the protocol conversion functionality into a separate, dedicated interface component. By taking out the conversion logic from both the CPU and accelerator sides and placing it in a standalone protocol conversion interface, the system achieves protocol compatibility while managing complexity through functional separation. This extracted interface handles only the protocol translation task, making the overall system architecture more modular and maintainable.
Data Source
AI summary
The coherent accelerator processor interface (CAPI) provides a high-performance when using heterogeneous compute architectures, but CAPI is not compatible with the advanced extensible interface (AXI) which is used by many accelerators. The examples herein describe an AXI-CAPI adapter (e.g., a hardware architecture) that converts AXI signals to CAPI signals and vice versus. In one example, the AXI-CAPI adapter includes four modules: a low-level shim, a high-level shim, an AXI full module, and an AXI Lite module which are organized in a hierarchy of hardware elements. Each of the modules outputs can output a different version of the AXI signals using the hierarchical structure.