Back-Bias Voltage Generating Circuit for Semiconductor Memory

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Solution Overview

Problem

Conventional semiconductor memory devices experience voltage level fluctuations in back-bias voltage due to the coupling effect with boosted voltage, leading to increased channel leakage current and unstable operations, especially during different operation modes.

Innovation Solution

A back-bias voltage generating circuit that adjusts its driving force based on the operation modes of the semiconductor memory device, using an active pumping control signal, a voltage detecting unit, an oscillator, and charge pumping units to maintain a stable back-bias voltage level regardless of the boosted voltage fluctuations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the back-bias voltage generating circuit operates with constant driving force, then the circuit structure is simple, but the back-bias voltage level fluctuates due to coupling effect with boosted voltage during different operation modes

Engineering Contradiction:
Improvecircuit structureVSAvoidback-bias voltage stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies the dynamics principle by making the driving force of the back-bias voltage generating circuit variable rather than constant. The circuit adjusts its driving force according to operation modes (active or standby) through control signals that enable or disable specific charge pumping units, allowing the back-bias voltage to remain stable despite fluctuations in boosted voltage during different operational states.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by modifying the driving force parameter of the back-bias voltage generating circuit based on operation modes. By changing the operational state of charge pumping units (first, second, third, and fourth charge pumping units) controlled by mode signals, the circuit adapts its characteristics to maintain stable back-bias voltage levels across different operational conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the driving force is increased to maintain stable back-bias voltage during active mode, then voltage stability is improved, but current consumption increases

Engineering Contradiction:
Improveback-bias voltage stabilityVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent dynamically adjusts the driving force based on operation modes. During active mode, the circuit employs a stronger driving force by activating appropriate charge pumping units to maintain stable back-bias voltage. During standby mode, the driving force is reduced by deactivating certain units, thereby lowering current consumption while still maintaining adequate voltage stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies partial action by selectively activating only the necessary charge pumping units required for each operation mode. Rather than operating all units continuously, the circuit uses mode control signals to enable only the appropriate subset of units (first through fourth charge pumping units) needed for the current operational state, optimizing the balance between voltage stability and power consumption.

Inventive Principle:
Principle #16Partial or excessive action

3Ease of manufacture

If the coupling effect between back-bias voltage and boosted voltage is present, then the MOS transistor structure is maintained, but voltage level fluctuation occurs due to parasitic capacitance

Engineering Contradiction:
ImproveMOS transistor structureVSAvoidvoltage level stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces control signals (mode signals and control signals) as intermediaries between the boosted voltage fluctuations and the back-bias voltage generating circuit. These intermediary signals detect the operation mode and appropriately adjust the charging/discharging operations of the charge pumping units, mediating the effect of boosted voltage fluctuations to prevent them from causing back-bias voltage level variations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback mechanisms where the operation mode information is fed back to control the driving force of the back-bias voltage generating circuit. The control circuit monitors operational states and adjusts the activity of charge pumping units accordingly, creating a feedback loop that maintains voltage stability despite the inherent parasitic capacitance coupling in the MOS transistor structure.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces current consumption in standby mode and ensures a stable back-bias voltage level in active mode, maintaining a constant refresh period and preventing voltage level fluctuations caused by boosted voltage variations.

Implementation Method 1

a first charge pumping unit for driving the back-bias voltage terminal by performing a charge pumping operation in response to the oscillation signal and the active pumping control signal, and a second charge pumping unit for driving the back-bias voltage terminal by performing a charge pumping operation in response to the oscillation signal

Methodology Applied
Scientific EffectCharge pumping:

Data Source

PatentUS7768843B2Semiconductor memory device for generating back-BIAS voltage with variable driving force
Publication Date: 2010.08.03 SK HYNIX INC
  • US7768843B2 patent drawing
  • US7768843B2 patent drawing
  • US7768843B2 patent drawing

AI summary

A semiconductor memory device is capable of maintaining a predetermined back-bias voltage level regardless of operation modes of the semiconductor memory device, by generating a back-bias voltage with driving force changed according to the operation modes. The semiconductor memory device includes an active pumping control signal generating unit for generating an active pumping control signal in response to a plurality of active signals, a voltage detecting unit for detecting a voltage level of a back-bias voltage terminal to output a detection signal, an oscillator for generating an oscillation signal oscillating at a predetermined frequency in response to the detection signal, and a charge pumping unit for performing a charge pumping operation in response to the oscillation signal by controlling a force of driving the back-bias voltage terminal in response to the active pumping control signal.