Back Contact Bottom Electrodes for Semiconductor Devices
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Solution Overview
Problem
Current semiconductor device fabrication using Ion Beam-Assisted Deposition (IBAD) templates on flexible substrates requires complex and expensive lithography processes for bottom electrodes, which increases costs and reduces active device area, limiting the performance of solar cells and flexible electronics.
Innovation Solution
A semiconductor device architecture that includes a polycrystalline or amorphous substrate with an electrically conductive IBAD template layer and a hetero-epitaxial buffer layer with a resistivity of less than 100 μΩcm, allowing for the use of bottom electrodes without the need for complex lithography, using materials like Titanium Nitride (TiN) or Nickel Silicide (NiSi2) as buffer layers, and optionally an amorphous layer between the substrate and the IBAD template.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If complex lithography processes are used to fabricate bottom electrodes on IBAD templates, then the device can be manufactured, but the manufacturing cost increases and the active device area decreases
Solution Approach 1:
The patent extracts and eliminates the complex lithography process from the bottom electrode fabrication sequence by using a self-aligned approach where the bottom electrode is formed directly on the IBAD template without requiring additional lithography steps, thereby simplifying the manufacturing process while maintaining device functionality
Solution Approach 2:
The patent segments the device structure into distinct functional layers where the IBAD template serves as both the substrate and the bottom electrode support, allowing the bottom electrode to be formed separately and directly connected to the template, thus avoiding the need for complex lithographic patterning
2Ease of manufacture
If complex lithography processes are used to fabricate bottom electrodes, then the device can be manufactured, but the manufacturing cost increases
Solution Approach 1:
The patent removes the expensive lithography process from the manufacturing sequence by implementing a direct formation method where the bottom electrode is created through simple deposition or sputtering techniques on the IBAD template, significantly reducing material and process costs while maintaining electrical performance
Solution Approach 2:
The patent employs cost-effective materials and processes for bottom electrode formation, using readily available conductive materials deposited through simple techniques rather than expensive lithographic methods, thereby reducing overall manufacturing costs while achieving the required electrical conductivity
3Ease of manufacture
If complex lithography processes are used to fabricate bottom electrodes, then the device can be manufactured, but the active device area decreases
Solution Approach 1:
The patent eliminates the lithography process entirely from bottom electrode fabrication, allowing the active device area to extend to the full substrate area without being reduced by lithographic pattern constraints, thereby maximizing the active area available for device operation
Solution Approach 2:
Instead of forming the bottom electrode through top-down lithographic patterning that reduces area, the patent inverts the approach by forming the electrode through bottom-up deposition methods that can cover the entire substrate area, thus maximizing the active device area while still providing proper electrical contacts
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of high-quality semiconductor devices with bottom electrodes, avoiding costly lithography processes and maximizing active device area, thus enabling low-cost, high-efficiency photovoltaics and flexible electronics on flexible substrates.
Implementation Method 1
The enabling technology to achieve such epitaxial thin films on these substrates is Ion Beam-Assisted Deposition (IBAD). In the IBAD process, materials with rock-salt structures such as magnesium oxide (MgO) are deposited on amorphous layers on any substrate, with simultaneous ion beam bombardment.
Implementation Method 2
Under proper conditions, within a first few nanometers of the film, a good degree of biaxial crystallographic orientation is achieved. Grains are aligned with respect to each other both in-plane and out-of-plane resembling a single-crystalline-like texture.
Implementation Method 3
at least one electrically conductive hetero-epitaxial buffer layer positioned above the IBAD template layer
Data Source
AI summary
A semiconductor device and method for fabricating same is disclosed. Embodiments are directed to a semiconductor device and fabrication of same which include a polycrystalline or amorphous substrate. An electrically conductive Ion Beam-Assisted Deposition (IBAD) template layer is positioned above the substrate. At least one electrically conductive hetero-epitaxial buffer layer is positioned above the IBAD template layer. The at least one buffer layer has a resistivity of less than 100 μΩcm. The semiconductor device and method foster the use of bottom electrodes thereby avoiding complex and expensive lithography processes.