Back Contact Optoelectronic Devices for CMOS Integration
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Solution Overview
Problem
Current semiconductor structures with optoelectronic devices integrated on silicon substrates primarily use top contacts, which do not offer the advantages of back contacts, such as uniform current injection, better heat sinking, and low series resistance, limiting the performance of integrated circuits due to increased power dissipation and signal delay at high clock speeds.
Innovation Solution
A semiconductor structure is developed with an optoelectronic device embedded in a dielectric material, where a bottom metal contact is formed in an air gap created by removing the underlying silicon or germanium layer, allowing a portion of the contact to contact the entire bottommost surface of the optoelectronic device, thereby providing a back contact for improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If top contacts are used for optoelectronic devices, then ease of processing is improved, but current injection uniformity and heat sinking performance deteriorate
Solution Approach 1:
The patent inverts the conventional contact configuration by moving the contact from the top surface to the bottom surface of the optoelectronic device. The bottom contact structure includes a contact opening extending through the substrate to contact the bottom surface of the device, achieving uniform current injection and improved heat sinking that were previously only attainable with back contacts.
2Ease of manufacture
If top contacts are used for optoelectronic devices, then ease of processing is improved, but series resistance increases
Solution Approach 1:
The patent inverts the conventional contact configuration by moving the contact from the top surface to the bottom surface of the optoelectronic device. The bottom contact structure includes a contact opening extending through the substrate to contact the bottom surface of the device, achieving uniform current injection and improved heat sinking that were previously only attainable with back contacts.
3Loss of energy
If optical interconnects are integrated alongside conventional silicon circuits, then power consumption and latency are reduced, but device complexity increases
Solution Approach 1:
The patent implements a dual-function substrate that supports both conventional CMOS circuits and optoelectronic devices. The substrate includes regions with different properties: a first region with a first dielectric constant for CMOS devices and a second region with a second dielectric constant for optoelectronic devices, allowing both types of devices to coexist on the same chip.
Solution Approach 2:
The patent introduces a waveguide structure as an intermediary element that couples the optoelectronic devices and enables optical signal transmission between them. The waveguide is formed in the substrate and provides a dedicated optical interconnect path that reduces power consumption and latency while maintaining compatibility with the underlying CMOS circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances current injection, heat sinking, and reduces series resistance, leading to improved performance and efficiency in optoelectronic devices integrated with CMOS devices by reducing power consumption and latency.
Implementation Method 1
back contacts to optoelectronic devices can provide uniform current injection, better heat sinking, low series resistance and/or a bottom mirror for light reflection
Data Source
AI summary
A semiconductor structure includes an optoelectronic device located in one region of a substrate. A dielectric material is located adjacent and atop the optoelectronic device. A top contact is located within a region of the dielectric material and contacting a topmost surface of the optoelectronic device. A bottom metal contact is located beneath the optoelectronic device and lining a pair of openings located with other regions of the dielectric material, wherein a portion of the bottom metal contact contacts an entire bottommost surface of the optoelectronic device.


