Back-Contact Solar Cell Protecting Layer for Etchant Damage
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Solution Overview
Problem
The preparation of back-contact type solar cells using existing methods results in increased resistance and decreased open circuit voltage due to the use of acid-based etchants like hydrofluoric acid, which damages the p-type semiconductor layer during the patterning process.
Innovation Solution
Incorporating an intrinsic silicon-based layer or an n-type silicon-based layer as an underlying protecting layer between the p-type semiconductor layer and the insulating layer prevents the etchant from contacting the p-type semiconductor layer, thereby improving contact resistance and open circuit voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If an insulating layer is formed directly on the p-type semiconductor layer and then etched using acid-based etchants, then the insulating layer can be removed for patterning, but the p-type semiconductor layer is damaged by the etchant, resulting in increased resistance and decreased open circuit voltage
Solution Approach 1:
An intrinsic silicon-based layer or n-type silicon-based layer is introduced as an intermediate protecting layer between the p-type semiconductor layer and the insulating layer. This intermediate layer acts as a mediator that protects the p-type semiconductor layer from direct contact with acid-based etchants during the patterning process, thereby preventing damage while still allowing the insulating layer to be removed for proper patterning.
Solution Approach 2:
The intrinsic silicon-based layer or n-type silicon-based layer is formed on the p-type semiconductor layer before forming the insulating layer. This preliminary action ensures that the p-type semiconductor layer is protected in advance before any etching process occurs, preventing etchant damage while enabling subsequent patterning operations.
2Ease of manufacture
If acid-based etchants are used to remove the insulating layer, then the patterning process can be completed, but the p-type semiconductor layer properties deteriorate due to etchant contact
Solution Approach 1:
The intrinsic silicon-based layer or n-type silicon-based layer serves as a protective intermediary that allows acid-based etchants to be used for easy insulating layer removal while preventing the etchants from contacting and damaging the p-type semiconductor layer, thus maintaining layer quality.
Solution Approach 2:
The protecting layer is segmented into multiple functional layers: an intrinsic silicon-based layer or n-type silicon-based layer for etchant protection, and an insulating layer for electrical isolation. This segmentation allows each layer to perform its specific function independently, enabling easy patterning while preserving semiconductor layer quality.
3Device complexity
If no protecting layer is used, then the manufacturing process is simpler, but the p-type semiconductor layer is directly exposed to etchants causing property deterioration
Solution Approach 1:
An intrinsic silicon-based layer or n-type silicon-based layer is introduced as a protecting layer between the p-type semiconductor layer and the external environment. This intermediary layer prevents direct contact between the p-type semiconductor layer and acid-based etchants during patterning, thereby maintaining low contact resistance and high reliability.
Solution Approach 2:
The protecting layer is applied locally where needed - specifically on regions where the p-type semiconductor layer requires protection during patterning. This localized approach provides necessary protection while minimizing additional structural complexity to only where it is functionally required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses the deterioration of properties during the patterning process, leading to enhanced contact resistance and open circuit voltage in back-contact type crystalline silicon-based solar cells.
Implementation Method 1
In a region where the n-type semiconductor layer is provided on the p-type semiconductor layer, a protecting layer is provided between the p-type semiconductor layer and the n-type semiconductor layer. The protecting layer includes at least one of an intrinsic silicon-based layer and an n-type silicon-based layer.
Implementation Method 2
the insulating layer on the p-type semiconductor layer is then removed using an acid-based etchant such as hydrofluoric acid
Implementation Method 3
When sunlight is captured from the light-receiving surface, electron-hole pairs are generated in the crystalline silicon substrate, and a current is extracted through an electrode provided on each of the p-layer and the n-layer.
Data Source
AI summary
The solar cell includes an n-type semiconductor layer and a p-type semiconductor layer on a first principal surface of a crystalline silicon substrate. The n-type semiconductor layer is provided so as to extend over a part on a p-type semiconductor layer-formed region provided with the p-type semiconductor layer, and a p-type semiconductor layer non-formed-region where the p-type semiconductor layer is not provided. In a region where the n-type semiconductor layer is provided on the p-type semiconductor layer, a protecting layer is between the p-type semiconductor layer and the n-type semiconductor layer. The protecting layer includes: an underlying protecting layer that is in contact with the p-type semiconductor layer; and an insulating layer that is on the underlying protecting layer. The underlying protecting layer includes an intrinsic silicon-based layer or an n-type silicon-based layer.