Back-Deposited Shielding Layer for Semiconductor Packaging

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor packaging structures face high manufacturing costs due to unnecessary metal scraps and reduced yield rates caused by over-plating and the need for pre-cut tape openings, which also limits the reusability of materials.

Innovation Solution

A semiconductor packaging structure with a back-deposited shielding layer featuring a substrate with an adhesive layer and a grid of frames, where semiconductor devices are aligned with solder balls on the adhesive layer, allowing for a reduced distance between the solder balls and the adhesive layer, preventing over-plating and enabling reusable substrates and grids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If pre-cut openings are made in the tape to accommodate solder balls, then the semiconductor devices can be properly positioned, but the tape cannot be reused and manufacturing cost increases

Engineering Contradiction:
Improvepositioning accuracyVSAvoidmanufacturing cost
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The invention divides the tape surface into multiple regions: adhesive regions for holding semiconductor devices and non-adhesive regions (openings) for accommodating solder balls. This segmentation allows the tape to be reused while maintaining proper positioning of both devices and solder balls during the metal deposition process.

Inventive Principle:
Principle #1Segmentation

2Reliability

If metal layer is deposited on semiconductor devices with gaps between devices and tape, then the metal layer covers the desired areas, but over-plating occurs on the edges and connects to solder balls reducing yield rate

Engineering Contradiction:
Improveshielding effectivenessVSAvoidmetal layer positioning
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The non-adhesive regions (openings) in the tape act as intermediaries that physically separate the metal deposition area from the solder ball areas. During metal deposition, the metal layer is deposited on the semiconductor devices and the tape surface, but the openings prevent metal from bridging to the solder balls, thus avoiding short circuits while maintaining shielding effectiveness.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the tape is cut to form openings, then solder balls can protrude through properly, but the tape loses reusability and requires extra processes to remove metal scraps

Engineering Contradiction:
Improvesolder ball alignmentVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The tape is designed with multi-functionality: the adhesive regions hold semiconductor devices in place, the non-adhesive regions accommodate solder balls, and the overall structure allows the tape to be reused across multiple production cycles. This universal design eliminates the need for pre-cutting openings and reduces the need for additional metal scrap removal processes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces manufacturing costs by eliminating the need for pre-cut openings and minimizing metal scraps, while maintaining effective electromagnetic interference shielding and heat dissipation, thereby improving the yield rate of semiconductor packaging structures.

Implementation Method 1

a substrate having an adhesive layer; a grid adhered to the adhesive layer of the substrate

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

the metal layer 52 is formed on the semiconductor devices 50 and the tape 40 by a metal deposition process

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS11658046B2Semiconductor packaging structure with back-deposited shielding layer and manufacturing method thereof
Publication Date: 2023.05.23 POWERTECH TECHNOLOGY INC
  • US11658046B2 patent drawing
  • US11658046B2 patent drawing
  • US11658046B2 patent drawing

AI summary

Batch semiconductor packaging structures with back-deposited shielding layer and manufacturing method are provided. A grid having multiple frames is glued on an adhesive substrate. Multiple semiconductor devices respectively align with corresponding frames and are stuck on the adhesive substrate. Then a metal layer covers the semiconductor devices and the grid. A distance between four peripheries of a bottom of each semiconductor device and the corresponding frame is smaller than a distance between the bottom and the adhesive substrate, so that the a portion of the metal layer extended to the peripheries of the bottom is effectively reduced during forming the metal layer. After the semiconductor devices are picked up, no metal scrap is remined thereon. Therefore, the adhesive substrate does not need to form openings in advance and is reusable. The grid is also reusable so the manufacturing cost of the present invention is decreased.