Back-Gate FET Current Control for Higher Intrinsic Gain
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Solution Overview
Problem
The increase in drain current with increasing drain-source voltage in field-effect transistors, particularly in CMOS processes, leads to reduced small-signal drain-source resistance and intrinsic gain, making it difficult to achieve high voltage gain in scaled CMOS technologies.
Innovation Solution
A control system regulates the backgate voltage of field-effect transistors to maintain a constant drain current, compensating for parasitic effects and improving intrinsic gain by integrating a control loop that adjusts the backgate voltage based on gate-source and drain-source voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If field-effect transistors are scaled down in CMOS processes, then transistor density and integration are improved, but parasitic effects increase causing drain current to increase with drain-source voltage, reducing small-signal drain-source resistance and intrinsic gain
Solution Approach 1:
The patent implements a feedback control mechanism where the control unit continuously monitors the drain current and adjusts the backgate voltage accordingly to maintain a constant drain current in the saturation region. This feedback loop compensates for the parasitic effects that increase with transistor scaling, thereby maintaining the small-signal drain-source resistance and intrinsic gain despite the downsizing of transistors.
Solution Approach 2:
The patent changes the backgate voltage parameter dynamically to compensate for parasitic effects. By adjusting the backgate voltage based on the operating conditions and drain current, the system optimizes the transistor characteristics to maintain high intrinsic gain even in scaled CMOS technologies where parasitic effects are pronounced.
2Reliability
If backgate voltage is regulated to maintain constant drain current, then small-signal drain-source resistance and intrinsic gain are improved, but device complexity increases due to control system requirements
Solution Approach 1:
The control unit is designed to automatically regulate the backgate voltage based on pre-stored electrical behavior data of the field-effect transistor. The system uses lookup tables containing drain current, gate-source voltage, and drain-source voltage data to determine appropriate backgate voltage adjustments without requiring complex real-time calculations or external control circuits, thereby reducing overall system complexity while maintaining high intrinsic gain.
3Reliability
If multiple field-effect transistors are stacked to achieve high voltage gain, then voltage gain is improved, but manufacturing difficulty increases due to low supply voltage constraints in scaled CMOS technologies
Solution Approach 1:
Instead of stacking multiple transistors, the patent achieves high voltage gain by changing the operating parameters of a single transistor through backgate voltage control. This approach maintains constant drain current in the saturation region, maximizing the small-signal drain-source resistance and intrinsic gain of the individual transistor, thereby achieving high voltage gain without the manufacturing complexities associated with stacking multiple transistors in low supply voltage environments.
Data Source
Figure 1~2
Figure 3~4
AI summary
A field-effect transistor arrangement (1) is proposed that comprises a field-effect transistor (T) having a back-gate connection (BG) adjustable using a back-gate voltage (VBG), wherein, further, the field-effect transistor (T) has a gate-source voltage (VGS) and a drain-source voltage (VDS) applied to it and a drain current ID flows through the field-effect transistor (T). Further, the field-effect transistor arrangement (1) comprises a control unit (10), connected to the back-gate connection (BG), that is configured to set the drain current (ID) flowing through the field-effect transistor (T) to a setpoint current by regulating the back-gate voltage (VBG) on the back-gate connection (BG), the back-gate voltage (VBG) being regulated on the basis of at least the gate-source voltage (VGS). Further, a method for setting a drain current of a field-effect transistor (T) is proposed.