Back-Gate Pixel Circuit for High-Frequency Threshold Compensation

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Solution Overview

Problem

Display devices face challenges in securing sufficient compensation time for transistor threshold voltage variations as resolution and driving frequency increase, leading to inefficiencies in display performance.

Innovation Solution

A pixel circuit design incorporating specific transistor configurations and a capacitor structure, including back-gate electrodes, allows for extended compensation time by adjusting gate signal pulse widths and utilizing a capacitor to stabilize voltage levels, ensuring precise data signal transmission and consistent luminance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the resolution of the display device is increased or the driving frequency is increased, then the display quality and response speed are improved, but the compensation time for transistor threshold voltage becomes insufficient

Engineering Contradiction:
Improvedriving frequencyVSAvoidcompensation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing threshold voltage compensation before the data signal is written to the pixel. The compensation transistor adjusts the threshold voltage of the drive transistor in advance during a dedicated compensation period, ensuring that the compensation is completed before the higher-frequency data writing begins, thus resolving the time conflict between high-speed operation and compensation requirements

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the resolution of the display device is increased, then the display clarity is improved, but the compensation time for transistor threshold voltage becomes insufficient

Engineering Contradiction:
Improvedisplay resolutionVSAvoidcompensation time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs threshold voltage compensation in advance during a dedicated compensation period before the data writing phase. This preliminary compensation ensures that even with increased resolution requiring more pixels to be addressed, each pixel has sufficient time to complete its threshold voltage adjustment before the high-resolution data signal is written, thus maintaining both display clarity and compensation accuracy

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If a conventional transistor configuration is used, then the device complexity is low, but the compensation effectiveness is insufficient

Engineering Contradiction:
Improvetransistor configurationVSAvoidcompensation effectiveness
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies local quality by introducing a back-gate electrode specifically to the drive transistor to enable independent threshold voltage control. This localized enhancement allows precise compensation of the drive transistor's threshold voltage without requiring complex modifications to other transistors in the pixel circuit, thus improving compensation effectiveness while maintaining overall device simplicity

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the electrical parameters of the drive transistor by applying a back-gate voltage through the back-gate electrode. This parameter change allows dynamic adjustment of the threshold voltage to compensate for variations, improving compensation effectiveness without requiring a complete redesign of the transistor configuration

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250336358A1Pixel circuit and display device including the same
Publication Date: 2025.10.30 SAMSUNG DISPLAY CO LTD
  • US20250336358A1 patent drawing
  • US20250336358A1 patent drawing
  • US20250336358A1 patent drawing

AI summary

A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.