Pixel Circuit Back-Gate Biasing for High-PPI Luminance Accuracy
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Solution Overview
Problem
Display devices with high pixels per inch (PPI) face challenges in maintaining luminance accuracy due to restricted data voltage range and increased pitch narrowing, which affects the pixel circuit's performance.
Innovation Solution
A pixel circuit design incorporating transistors with back gate electrodes receiving power supply voltage, utilizing multiple capacitors and transistors to compensate for threshold voltage changes and extend the data voltage range, including a first capacitor connected between the gate and source electrodes of a first transistor, a second capacitor connected between the gate and drain electrodes, and a third capacitor connected to the gate electrode, along with power supply voltage application to minimize body effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel circuit area is reduced to achieve high PPI, then the display device can provide high pixels per inch, but the data voltage range is restricted and luminance accuracy decreases
Solution Approach 1:
The patent applies parameter changes by utilizing back gate electrodes to modify the threshold voltage of transistors dynamically. By adjusting the voltage applied to the back gate electrode, the threshold voltage can be compensated to maintain luminance accuracy even when the pixel circuit area is reduced for high PPI displays.
Solution Approach 2:
The back gate electrode acts as an intermediary element that mediates between the gate electrode and the source/drain electrodes. It provides an additional degree of freedom to control the transistor characteristics, allowing independent adjustment of threshold voltage to compensate for area constraints.
2Measurement precision
If the pitch is narrowed to increase PPI, then high pixels per inch is achieved, but the data voltage range decreases
Solution Approach 1:
The back gate electrode enables dynamic parameter changes in the transistor threshold voltage, which can compensate for the reduced data voltage range caused by narrowed pitch. This allows the pixel circuit to maintain adequate voltage headroom even at reduced pitch dimensions.
3Productivity
If the number of transistors is restricted due to narrowed pitch, then high PPI is achieved, but the pixel circuit performance is affected
Solution Approach 1:
The back gate electrode serves multiple functions: it acts as an additional control terminal for threshold voltage adjustment, provides a mechanism for compensating process variations, and enables dynamic characterization of transistor behavior. This multi-functionality allows maintaining pixel circuit performance with fewer transistors.
Solution Approach 2:
By introducing the back gate electrode as an additional control parameter, the patent enables fine-tuning of transistor characteristics to compensate for the reduced number of transistors, thereby maintaining circuit performance despite lower device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances luminance accuracy by compensating for threshold voltage changes and extending the data voltage range, ensuring stable operation even at high PPI, thereby improving display performance.
Implementation Method 1
a first capacitor including a first electrode connected to a first electrode of the first transistor and a second electrode connected to a gate electrode of the first transistor
Implementation Method 2
Back gate electrodes of the first to fifth transistors may receive the first power supply voltage
Data Source
AI summary
A pixel circuit comprises a light emitting element, a first transistor providing a driving current to the light emitting element, a first capacitor including a first electrode connected to a first electrode of the first transistor and a second electrode connected to a gate electrode of the first transistor, a second capacitor including a first electrode connected to the gate electrode of the first transistor and a second electrode connected to a second electrode of the first transistor, a second transistor providing a data voltage to a first electrode of a third capacitor in response to a first write gate signal, a third capacitor including a second electrode connected to the gate electrode of the first transistor, and a third transistor providing the data voltage to the gate electrode of the first transistor in response to a second write gate signal.