Back Gate Single-Crystal Flexible Thin Film Transistor
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Solution Overview
Problem
Mainstream thin film transistors using amorphous or polycrystalline materials face limitations in performance due to their non-crystalline nature, and top gate crystalline transistors face complexity in gate dielectric deposition and interconnect wiring.
Innovation Solution
A back gate single-crystal thin film transistor is formed using a controlled spalling process, where a gate dielectric and conductor are deposited on a single-crystal semiconductor material, surrounded by a dielectric structure, and a stressor layer is applied, allowing for the exposure of a surface for source and drain region formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If top gate crystalline transistors are made by controlled spalling, then device performance is improved, but fabrication complexity increases due to gate dielectric deposition and stressor layer removal
Solution Approach 1:
The patent inverts the conventional top gate structure to create a back gate configuration. The gate dielectric and gate electrode are formed on the back surface of the semiconductor substrate, allowing the channel surface to remain exposed and accessible for source/drain formation. This inversion eliminates the need for complex stressor layer removal and enables direct access to the channel surface, thereby reducing fabrication complexity while maintaining crystalline performance.
Solution Approach 2:
The patent segments the transistor structure into distinct surfaces: the front surface is dedicated to source/drain regions and channel access, while the back surface houses the gate dielectric and gate electrode. This spatial segmentation allows independent optimization of each region and simplifies the fabrication process by eliminating the need to access the gate dielectric surface through complex removal steps.
2Reliability
If top gate TFT structure is used, then device performance is improved, but interconnect and wiring complexity increases
Solution Approach 1:
By inverting the gate structure to a back gate configuration, the patent simplifies interconnect wiring. The gate electrode is accessible from the back surface, allowing for simpler routing and connection schemes compared to top gate structures where gate connections must navigate around source/drain regions on the same surface.
3Ease of manufacture
If amorphous or polycrystalline materials are used in TFT, then large area and low-cost processing is achieved, but device performance is limited
Solution Approach 1:
The patent changes the material parameter from amorphous or polycrystalline to single-crystal semiconductor material. This parameter change dramatically improves device performance (mobility and drive current) while maintaining compatibility with low-cost substrates through the back gate thin-film structure and controlled spalling process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of thin film transistors by utilizing single-crystal semiconductor materials and simplifies the fabrication process by reducing complexity in gate dielectric deposition and interconnect wiring.
Implementation Method 1
a controlled spalling process is then performed and thereafter a material removal process can be used to expose a surface of the single-crystal semiconductor material
Implementation Method 2
A stressor layer is then formed atop the dielectric structure
Data Source
AI summary
A gate dielectric material and a gate conductor portion are formed on a single-crystal semiconductor material of a substrate. A dielectric structure is then formed surrounding the gate conductor portion and thereafter a stressor layer is formed on the dielectric structure. A controlled spalling process is then performed and thereafter a material removal process can be used to expose a surface of the single-crystal semiconductor material. A source region and a drain region are then formed on the exposed surface of the single-crystal semiconductor material, which exposed surface is opposite the surface including the gate dielectric.