Back Gate Threshold Voltage Control in 3D NAND Memory
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Solution Overview
Problem
In 3-dimensional NAND memory arrays, back gate transistors can deviate from their desired threshold voltage ranges due to charge accumulation, leading to operational issues such as increased ECC errors and reduced data accessibility.
Innovation Solution
A method and circuitry are implemented to monitor and adjust the threshold voltages of back gate transistors by adding or removing charge, ensuring they remain within a specified range, triggered by events like wear, ECC errors, or prolonged usage, using charge-increasing and charge-decreasing circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If back gate transistors are used in 3-D NAND memory arrays, then data storage capacity is improved, but threshold voltage drift occurs leading to increased ECC errors
Solution Approach 1:
The patent implements a feedback mechanism where the threshold voltage of back gate transistors is continuously monitored and compared against a desired range. When drift is detected, the system automatically adjusts the threshold voltage by adding or removing charge from the back gate, thereby correcting the drift and reducing ECC errors without manual intervention
Solution Approach 2:
The patent dynamically changes the threshold voltage parameter of back gate transistors by controlling charge accumulation. By adjusting the charge state of the back gate, the system can shift the threshold voltage to maintain optimal operating conditions, preventing drift-induced errors while preserving high storage capacity
2Manufacturing precision
If charge is accumulated in back gate transistors, then threshold voltage control is improved, but charge leakage occurs causing threshold voltage to drift outside desired range
Solution Approach 1:
The patent performs preliminary charge adjustment operations to set the back gate threshold voltage within the desired range before normal operation begins. This preliminary action ensures that the back gate is properly conditioned, preventing future drift and maintaining stable threshold voltage throughout the memory's operational life
Solution Approach 2:
The system implements self-service functionality where the back gate threshold voltage is automatically monitored and adjusted without external intervention. The memory controller detects threshold voltage drift and autonomously performs charge addition or removal operations to restore the threshold voltage to the desired range, ensuring long-term stability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains optimal operational conditions for back gate transistors, reducing ECC errors and ensuring reliable data access by maintaining threshold voltages within desired ranges, thereby enhancing the performance and longevity of 3-D NAND memory arrays.
Implementation Method 1
back gates include charge storage elements that may come to contain some charge (even if charge is never deliberately stored there)
Implementation Method 2
The operation to change the threshold voltage may add charge to a charge storage element of the back gate transistor
Implementation Method 3
The operation to change the threshold voltage may remove charge from a charge storage element of the back gate transistor
Data Source
AI summary
In a nonvolatile memory array in which a NAND string includes a back gate that has a charge storage element, the threshold voltage of the back gate is monitored, and if the threshold voltage deviates from a desired threshold voltage range, charge is added to, or removed from the charge storage element to return the threshold voltage to the desired threshold voltage range.