Neural Network Semiconductor Circuit With Back-Gate Variation Correction
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Solution Overview
Problem
As the complexity and size of artificial neural networks increase, so does power consumption and heat generation, affecting circuit components and requiring efficient solutions for low power consumption, temperature resilience, and correction of component variations.
Innovation Solution
A semiconductor device with a hierarchical artificial neural network structure, incorporating transistors and capacitors to manage signal processing and correction, utilizing metal oxide channels for efficient operation and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of layers, neurons, and circuits in the artificial neural network increases to improve processing capability, then the computational power and accuracy improve, but power consumption increases
Solution Approach 1:
The artificial neural network is divided into multiple layers (input layer, hidden layers, output layer) with each layer processing signals independently. This segmentation allows the system to achieve high computational power through distributed processing while managing power consumption by activating only necessary neural pathways for each computation task.
Solution Approach 2:
The semiconductor device employs periodic switching of transistors to control signal transmission through the neural network. By using periodic gate signals to switch transistors on and off, the system achieves efficient computation with reduced power consumption compared to continuous operation, as the periodic action allows for duty cycle optimization.
2Productivity
If the number of circuits increases to improve processing capability, then the computational power improves, but heat generation increases and affects circuit characteristics
Solution Approach 1:
The patent replaces traditional voltage-based signal transmission with current-based signal transmission through the neural network. This substitution reduces heat generation because current-mode operation in the metal oxide semiconductor transistor generates less Joule heating compared to voltage-mode operation, allowing higher computational power without excessive temperature rise.
Solution Approach 2:
The semiconductor device uses metal oxide semiconductor material with specific properties (high mobility, low off-state current) to construct the transistor channel. This composite material approach enables the circuit to handle higher power densities while maintaining stable characteristics at elevated temperatures, effectively managing heat generation in high-computational-power configurations.
3Productivity
If more circuit components are formed to increase processing capability, then the computational power improves, but variations in component characteristics increase
Solution Approach 1:
The patent utilizes the unique electrical characteristics of metal oxide semiconductor transistors, particularly their high carrier mobility and low off-state current, to reduce sensitivity to component variations. By operating in specific parameter regions enabled by this material, the system achieves stable neural network computation even with manufacturing variations in transistor parameters across the large number of circuits.
Data Source
AI summary
In a semiconductor device capable of product-sum operation, variations in transistor characteristics are reduced. The semiconductor device includes a first circuit including a driver unit, a correction unit, and a holding unit, and an inverter circuit. The first circuit has a function of generating an inverted signal of a signal input to an input terminal of the first circuit and outputting the inverted signal to an output terminal of the first circuit. The driver unit includes a p-channel first transistor and an n-channel second transistor having a back gate. The correction unit has a function of correcting the threshold voltage of one or both of the first transistor and the second transistor. The holding unit has a function of holding the potential of the back gate of the second transistor. The output terminal of the first circuit is electrically connected to an input terminal of the inverter circuit. The time from the input of a signal to the input terminal of the first circuit to the output of a signal from an output terminal of the inverter circuit depends on the potential of the back gate of the second transistor.


