Back Gate Voltage Adjustment for 3D NAND Memory Programming
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Solution Overview
Problem
In three-dimensional NAND memory arrays, high threshold voltages in back gate transistors can lead to programming failures, especially near the back gate, and may become irreversibly elevated due to erase saturation, making it difficult to maintain threshold voltages within a target range, thereby affecting data programming and error rates.
Innovation Solution
A method is introduced to dynamically adjust programming conditions by applying different back gate voltages over time, including a first set for initial operation and subsequent sets as needed, to accommodate changing threshold voltages, with a back gate control circuit managing these voltage adjustments to maintain optimal programming performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If back gate voltage is increased to turn on transistors with elevated threshold voltages, then programming reliability improves, but device complexity increases due to dynamic voltage adjustment requirements
Solution Approach 1:
The back gate control circuit dynamically adjusts the back gate voltage from a default voltage to a higher modified voltage based on detected programming failures. This dynamic adaptation allows the system to maintain programming reliability in back gate transistors with elevated threshold voltages without requiring permanent hardware modifications, resolving the contradiction between reliability and device complexity.
Solution Approach 2:
The system changes the operating parameter (back gate voltage level) from a fixed default voltage to a variable voltage that can be increased to a modified voltage. This parameter change enables the system to accommodate elevated threshold voltages in back gate transistors while maintaining programming effectiveness, addressing the reliability issue without permanently increasing device complexity.
2Productivity
If back gate voltage is increased to accommodate elevated threshold voltages, then programming performance improves, but energy consumption increases
Solution Approach 1:
The back gate control circuit implements dynamic voltage adjustment, applying the higher modified voltage only when programming failures are detected in specific word lines. During normal operation with healthy transistors, the default lower voltage is maintained, optimizing energy consumption. This dynamic approach balances programming performance and energy usage based on actual device conditions.
Solution Approach 2:
The system applies different voltage levels to different regions of the memory array based on their condition. Back gate transistors with elevated threshold voltages receive the higher modified voltage, while other transistors continue to operate with the default voltage. This localized quality adjustment improves programming performance where needed without unnecessarily increasing energy consumption across the entire device.
3Adaptability or versatility
If back gate transistors are used to connect NAND string wings, then device integration improves, but threshold voltage instability worsens due to erase saturation
Solution Approach 1:
The back gate control circuit implements a feedback mechanism that monitors programming operations and detects failures caused by elevated threshold voltages in back gate transistors. Based on this feedback, the circuit automatically adjusts the back gate voltage to a higher modified voltage, compensating for threshold voltage instability and maintaining reliable operation despite erase saturation effects.
Solution Approach 2:
The system changes the back gate voltage parameter from a fixed default value to a modified value that compensates for threshold voltage drift. This parameter adjustment allows the system to maintain stable programming performance even as the back gate transistor threshold voltages become unstable due to erase saturation, preserving device integration benefits while overcoming the stability issue.
Data Source
AI summary
In a three dimensional NAND memory, increased threshold voltages in back gate transistors may cause program failures, particularly along word lines near back gates. When back gate transistor threshold voltages cannot be returned to a desired threshold voltage range then modified program conditions, including increased back gate voltage, may be used to allow programming.