Back-Illuminated Light Receiving Element for Higher Pixel Sensitivity

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Solution Overview

Problem

Current CAPD sensors face challenges in securing a sufficient photoelectric conversion region due to wiring lines on the light receiving surface, leading to degraded pixel sensitivity and accuracy in ranging systems, especially under external light conditions and with near-infrared light sources.

Innovation Solution

A light receiving element with an on-chip lens, a wiring layer, and a semiconductor layer that includes a photodiode, transfer transistors, and an interpixel separation portion, where the wiring layer has a light blocking member overlapping with the photodiode, enhancing light blocking and separation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If wiring lines are disposed on the light receiving surface side of the photodiode to enable charge extraction and control, then the sensor can function properly, but the photoelectric conversion region is limited and pixel sensitivity is degraded

Engineering Contradiction:
Improvecharge extraction capabilityVSAvoidpixel sensitivity
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent inverts the conventional surface-illuminated structure to a back-illuminated structure, where light enters through the rear surface of the substrate opposite to the light-receiving surface. This allows wiring lines to be disposed on the light-receiving surface without blocking incident light, as the light path and wiring layer are separated spatially. The photodiode's light-receiving surface is thus freed from wiring obstructions while maintaining charge extraction functionality through the inverted architecture.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions from a two-dimensional planar layout to a three-dimensional stacked architecture. By vertically stacking the light-receiving surface, photodiode, and wiring layers in different depth planes, the design eliminates the conflict between light path and wiring. The light-receiving surface is positioned in one dimensional plane while wiring is placed in another plane, allowing both to coexist without interference and maximizing the photoelectric conversion region.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves the quantum efficiency and aperture ratio, leading to enhanced ranging characteristics and accuracy by minimizing light interference and noise, particularly with near-infrared light sources.

Implementation Method 1

a photodiode

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Implementation Method 2

an on-chip lens

Methodology Applied
Scientific EffectLight focusing: Lens

Implementation Method 3

the wiring layer has at least one layer including a light blocking member

Methodology Applied
Scientific EffectLight blocking: Absorption (EM radiation)

Data Source

PatentUS12176373B2Light receiving element, ranging module, and electronic apparatus
Publication Date: 2024.12.24 SONY SEMICON SOLUTIONS CORP
  • US12176373B2 patent drawing
  • US12176373B2 patent drawing
  • US12176373B2 patent drawing

AI summary

Disclosed is a light receiving element including an on-chip lens, a wiring layer, and a semiconductor layer disposed between the on-chip lens and the wiring layer. The semiconductor layer includes a photodiode, a first transfer transistor that transfers electric charge generated in the photodiode to a first charge storage portion, a second transfer transistor that transfers electric charge generated in the photodiode to a second charge storage portion, and an interpixel separation portion that separates the semiconductor layers of adjacent pixels from each other, for at least part of the semiconductor layer in the depth direction. The wiring layer has at least one layer including a light blocking member. The light blocking member is disposed to overlap with the photodiode in a plan view.