Back-Miller Effect Modeling in Digital Circuit Timing Analysis
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current digital circuit timing analysis methods, such as Static Timing Analysis (STA), are inadequate for accurately modeling receiver loads in advanced semiconductor designs, particularly due to the back-Miller effect and resistive shielding phenomena, leading to significant waveform anomalies and errors in delay calculations.
Innovation Solution
A new receiver load modeling approach separates total receiver charge into static and dynamic components, using a static capacitance and a current source in parallel, and incorporates a perturbative method to capture physical phenomena like the back-Miller effect, allowing for more accurate circuit behavior simulation without full transistor-level simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complete transistor-level simulation is used to accurately model receiver loads and capture physical phenomena like back-Miller effect, then measurement precision and reliability improve, but productivity and ease of operation deteriorate due to excessive computational expense
Solution Approach 1:
The receiver load model is segmented into two distinct components: a static capacitance element and a dynamic back-Miller current source. This segmentation allows the complex nonlinear receiver behavior to be decomposed into manageable parts that can be modeled separately and combined, achieving accurate timing analysis without requiring complete transistor-level simulation.
Solution Approach 2:
The invention changes the modeling parameters from detailed transistor-level parameters to equivalent circuit parameters (capacitance and current source characteristics). By transforming the problem into the equivalent circuit domain, the model captures essential physical phenomena like back-Miller effect while maintaining computational efficiency suitable for routine timing analysis.
2Productivity
If traditional single capacitance pin model is used for receiver load, then ease of operation and computational speed improve, but measurement precision deteriorates due to inability to capture back-Miller effect and waveform anomalies
Solution Approach 1:
The receiver load model transitions from a static single capacitance value to a dynamic model that includes a time-varying current source representing the back-Miller effect. This dynamic component activates during voltage transitions and deactivates afterward, accurately capturing the transient behavior and waveform anomalies that occur during switching events while maintaining computational efficiency.
3Area of stationary object
If advanced fabrication process features are reduced in size to increase integration density, then area of stationary object improves, but measurement precision deteriorates due to increased receiver input capacitance fraction and more dynamic electrical behavior
Solution Approach 1:
The invention applies different modeling qualities to different aspects of the receiver load: a static capacitance model for the baseline load and a dynamic current source model for the back-Miller effect. This localized quality approach allows accurate modeling of the increasingly significant receiver input capacitance fraction in advanced processes without requiring proportionally increased computational resources.
Data Source
AI summary
A system, method, and computer program product for modeling a receiver load in static timing analysis of digital circuits. Embodiments separate total receiver charge into static and dynamic components, and extract both from an improved library model. The receiver load is effectively modeled with a static capacitance and a current source connected in parallel. A method of extracting load model characteristics from a standard timing library is also provided. The improved receiver model reflects the physical phenomena not currently modeled, and enables a more accurate description of circuit behavior while still using a simple approximation of the transistor level circuit. The complete circuit switching response is found through a perturbative approach, combining a linear response using constant capacitance values with a correction having time-dependent charges for modeling physical phenomena such as the back-Miller effect. The result is improved circuit timing evaluation, with good accuracy versus SPICE simulation for waveforms and delays.