Back-Side Doped Layer Reduces Leakage in Thinned Semiconductors
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Solution Overview
Problem
The semiconductor industry faces challenges in forming reliable semiconductor devices at increasingly smaller sizes due to the complexity of fabrication processes as feature sizes decrease, leading to defects and leakage currents.
Innovation Solution
A process involving the formation of a doped layer with higher dopant concentration over the semiconductor substrate, followed by annealing to recrystallize and repair defects, and the use of conductive and insulating layers to connect devices, reduces leakage current and improves yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then the number of interconnected devices per chip area increases, but fabrication processes become more difficult and defects increase
Solution Approach 1:
A doped layer is formed over the semiconductor substrate before final device fabrication to preemptively repair defects. This preliminary action addresses potential manufacturing issues before they manifest in the final device, allowing smaller feature sizes without proportionally increasing fabrication difficulty.
Solution Approach 2:
The patent introduces a doped layer with specific dopant concentrations and conductivity types that modify the electrical parameters of the substrate. This parameter change enables better control over leakage currents and defect behavior, facilitating higher functional density while maintaining manufacturing feasibility.
2Length of moving object
If feature sizes continue to decrease, then device miniaturization is achieved, but leakage currents increase due to defects
Solution Approach 1:
The patent converts the harmful effect of defects into a beneficial outcome by introducing a doped layer that deliberately creates controlled electrical properties. This layer repairs harmful leakage paths while maintaining the miniaturized feature sizes, effectively transforming potential failure points into reliability enhancements.
Solution Approach 2:
The doped layer acts as an intermediary between the semiconductor substrate and the overlying device structures. It mediates the electrical behavior by providing a controlled conductivity path that prevents unwanted leakage currents while allowing the miniaturized features to function as intended.
3Ease of manufacture
If conventional processes are used at smaller sizes, then manufacturing complexity increases, but device yield decreases due to defects
Solution Approach 1:
The doped layer is formed as a preliminary step that proactively addresses defect issues before final device fabrication. This preliminary action simplifies subsequent manufacturing steps by pre-correcting substrate issues, thereby maintaining ease of manufacture while improving device yield through defect repair.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process effectively decreases leakage current and enhances the yield of semiconductor devices by repairing defects and improving electrical connectivity, allowing for the production of reliable devices at smaller scales.
Implementation Method 1
annealing to recrystallize and repair defects
Data Source
AI summary
The present disclosure relates to a method of forming a semiconductor device structure. The method may be performed by forming a gate structure along a first side of a semiconductor substrate. The semiconductor substrate is thinned. Thinning the semiconductor substrate causes defects to form along a second side of the semiconductor substrate opposing the first side of the semiconductor substrate. Dopants are implanted into the second side of the semiconductor substrate after thinning the semiconductor substrate. The semiconductor substrate is annealed to form a doped layer after implanting the dopants. The doped layer is formed along the second side of the semiconductor substrate.