Back-Side ESD Diodes for TSV Substrates

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Solution Overview

Problem

In wireless communication devices using through-silicon-via (TSV) technology, electrostatic discharge diodes placed at the front-side of silicon chips consume valuable die area that could be used for active circuits, and existing solutions for sinking electrostatic charges can impose high temperature constraints affecting integrated circuits.

Innovation Solution

Forming electrostatic discharge diodes on the back-side of silicon chips, using a metallic redistribution layer to create Schottky barrier diodes that sink electrostatic charges into the silicon substrate, allowing for both negative and positive polarity charges to be managed without occupying front-side die area and reducing temperature constraints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electrostatic discharge diodes are placed at the front-side of silicon chips, then electrostatic charges can be sunk into the substrate, but valuable die area is consumed that could be used for active circuits

Engineering Contradiction:
Improveelectrostatic charge managementVSAvoidfront-side die area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent moves the electrostatic discharge diodes from the front-side (active layer) to the back-side of the silicon wafer. This spatial relocation to another dimension (back-side vs front-side) allows the ESD diodes to sink charges without occupying valuable front-side die area used for active circuits, thereby resolving the area consumption problem while maintaining electrostatic protection functionality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional electrostatic discharge solutions are used, then charges can be sunk, but high temperature constraints are imposed that affect integrated circuits

Engineering Contradiction:
Improveelectrostatic charge managementVSAvoidprocess temperature constraints
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent extracts the electrostatic discharge diodes from the front-side active circuit region and places them on the back-side of the wafer. This separation allows the ESD diodes to be processed and operated independently, removing the high temperature constraints that would otherwise affect the integrated circuits on the front-side, while still providing effective charge sinking capability

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for effective electrostatic charge management without consuming front-side die area, enabling more active circuitry and reducing temperature-related process constraints, thus improving design flexibility and device performance.

Implementation Method 1

a metallic redistribution layer may form a Schottky barrier diode when coming into contact with the silicon substrate of the chip

Methodology Applied
Scientific EffectSchottky barrier diode: Diode

Implementation Method 2

The Schottky barrier diode may activate in response to a negative voltage (e.g., electrostatic charges having a negative polarity) and may sink the electrostatic charges into the silicon substrate

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Implementation Method 3

The diode may activate in response to a positive voltage (e.g., electrostatic charges having a positive polarity) and sink the electrostatic charges into the silicon substrate

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Data Source

PatentUS9379201B2Electrostatic discharge diodes and methods of forming electrostatic discharge diodes
Publication Date: 2016.06.28 QUALCOMM INC
  • US9379201B2 patent drawing
  • US9379201B2 patent drawing
  • US9379201B2 patent drawing

AI summary

A method includes thinning a back-side of a substrate to expose a portion of a first via that is formed in the substrate. The method also includes forming a first diode at the back-side of the substrate. The first diode is coupled to the first via.