Back Surface Electrode Diverts Displacement Currents in HVIC
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Solution Overview
Problem
Existing semiconductor devices, such as high voltage driver ICs (HVICs), face challenges in achieving sufficient dV/dt robustness without increasing costs due to the complexity and area requirements of trench structures used to manage displacement currents, which can lead to faulty operations and device destruction.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate with selectively formed regions of different conductivity types, where the distance between these regions is shorter than the minority carrier diffusion length, and a back surface electrode is used to direct displacement currents away from the surface, preventing parasitic transistor operation without the need for trench structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If trench structures are used to manage displacement currents and prevent parasitic transistor operation, then dV/dt robustness is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The invention extracts the displacement current management function from the complex trench structure and relocates it to a simplified back surface electrode configuration. By providing a direct current path from the back surface to the n-type region, the harmful displacement current is diverted away from the parasitic transistor base, achieving dV/dt robustness without requiring complex trench structures.
Solution Approach 2:
Instead of managing displacement currents at the front surface through complex trench structures, the invention inverts the approach by managing currents at the back surface through a simple electrode. This inversion simplifies the structure while maintaining the essential function of preventing parasitic transistor operation.
2Reliability
If trench structures are used to prevent parasitic transistor operation, then device reliability is improved, but manufacturing cost increases
Solution Approach 1:
The invention extracts the essential function of parasitic transistor prevention from the expensive trench structure and implements it through a simple back surface electrode. This extraction eliminates the need for complex fabrication processes while maintaining protection against parasitic transistor operation.
Solution Approach 2:
The invention replaces the expensive, complex trench structure with a simple, inexpensive back surface electrode that performs the same protective function. This substitution uses a cheaper structural element to achieve the same reliability outcome.
3Area of stationary object
If the distance between n-type regions is reduced below minority carrier diffusion length, then chip area is reduced, but displacement current management becomes more difficult
Solution Approach 1:
The invention solves the displacement current management problem by adding a vertical dimension (back surface electrode) rather than relying solely on horizontal spacing between n-type regions. This dimensional change allows compact chip area while maintaining effective displacement current management through the vertical current path.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design provides robustness against dV/dt variations without increasing chip area or process complexity, thereby maintaining cost-effectiveness and preventing faulty operations.
Implementation Method 1
displacement currents, which can lead to faulty operations and device destruction
Implementation Method 2
the high voltage section and the low voltage section can be electrically isolated by p-n junction capacitance
Implementation Method 3
the depletion layer expands in parallel with the surface of the substrate at a parallel plate junction at the bottom of a planar junction
Implementation Method 4
With the RESURF structure, electric field strength is made reduced, by which high voltage withstanding characteristics can be obtained
Data Source
AI summary
A semiconductor device includes a surface layer on the side of a first principal surface of a p-semiconductor substrate, a high side n-isolation-diffused region and a low side n-isolation-diffused region formed apart from each other by a distance that is shorter than the diffusion length of electrons in the p-semiconductor substrate. In a region between the high side n-isolation-diffused region and the low side n-isolation-diffused region, a p-region is formed which has a higher impurity concentration than the p-semiconductor substrate. A first electrode in contact with the p-region and a second electrode in contact with a second principal surface of the p-semiconductor substrate are brought to be at the ground potential. This, at switching of a low side IGBT, makes a charging or discharging current flowing from the high side n-isolation-diffused region flow toward the back surface of the substrate to be taken out from the second electrode.