Back-Surface Power Line Routing for Solid-State Image Sensors
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Solution Overview
Problem
Conventional photoelectric conversion devices face issues with voltage drop and shading due to increased resistance in power lines, leading to degraded image quality and reduced readout speed, especially in large-scale solid-state image sensors.
Innovation Solution
A new power line structure is introduced, featuring a first and second power line with a cross connection line that crosses the common signal line, reducing power line resistance and parasitic capacitance, thereby improving image quality and readout speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stress or pressure
If a third metal layer is added to reduce power line resistance, then voltage drop is reduced, but parasitic capacitance of common signal line increases significantly
Solution Approach 1:
The patent transitions from a planar power line arrangement to a three-dimensional structure by forming power lines on the back surface of the substrate. This spatial reconfiguration allows power lines to be positioned in a different dimension relative to signal lines, reducing parasitic capacitance while maintaining low resistance through optimized back-surface routing.
Solution Approach 2:
The patent divides the power line structure into multiple segments: front surface power lines, back surface power lines, and vertical connection lines. This segmentation allows each portion to be optimized independently, with back surface lines providing low-resistance power delivery without adding parasitic capacitance to front surface signal lines.
2Stress or pressure
If power line resistance is reduced by widening or shortening lines, then voltage stability improves, but device area increases
Solution Approach 1:
By utilizing the back surface of the substrate for power line routing, the patent effectively doubles the available wiring space without increasing the device footprint. This three-dimensional wiring approach allows for shorter, lower-resistance power lines while maintaining compact form factor.
3Use of energy by moving object
If signal processing circuit is turned off to suppress power consumption, then energy efficiency improves, but circuit stabilization time increases when switching on
Solution Approach 1:
The three-dimensional power line structure with back surface routing provides lower resistance and better power delivery control. This enables more precise power management for signal processing circuits, allowing faster ramp-up currents when circuits are activated, thereby reducing stabilization time while maintaining low power consumption during idle states.
Data Source
AI summary
A photoelectric conversion device includes a pixel array portion, signal processing portion, common readout circuit, and common signal line. The signal processing portion includes the first power line and the second power line which is formed on the opposite side to the first power line when viewed from the common signal line. The common signal line has a portion formed along the signal processing portion to transfer, to the common readout circuit, a signal supplied from the signal processing portion. A cross connection line which crosses the portion of the common signal line along the signal processing portion connects the first and second power lines.