Back-to-Back Stacked IC Assembly via Wire Bonding
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Solution Overview
Problem
There is a need to produce small, complex circuit boards in a cost-efficient manner, as existing methods for integrating multiple integrated circuit chips often require expensive and precise vertical connections, which increase the size and cost of the assembly.
Innovation Solution
A back-to-back stacked integrated circuit assembly method where chips are stacked without vertical connections, using solder bumps and wire bonding to connect them directly to a printed circuit board, allowing for thinner and more compact designs without the need for precise chip-to-chip alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If vertical connections (through-silicon via) are used to connect stacked chips, then the package size is reduced, but the manufacturing cost and complexity increase
Solution Approach 1:
The patent transitions from vertical connection (through-silicon via) to horizontal connection (wire bonding from side walls), changing the dimensional approach of electrical interconnection. This allows chips to be stacked vertically while maintaining electrical connections through lateral wire bonds from the side walls of through-holes, rather than requiring vertical vias through the chip substrate.
Solution Approach 2:
The patent introduces side walls of through-holes as intermediary structures that enable wire bonding. These side walls serve as the bonding surface for wire bonds to connect from the first chip to the second chip, acting as a mediator that eliminates the need for direct vertical through-silicon vias while maintaining electrical connectivity.
2Reliability
If through-silicon via connections are used for chip stacking, then electrical connection is achieved, but the manufacturing cost increases
Solution Approach 1:
The patent extracts the electrical connection function from the through-silicon via structure and relocates it to wire bonds formed from the side walls of through-holes. This separation allows the through-holes to serve primarily as structural and alignment features, while the wire bonds provide the electrical connection, simplifying the manufacturing process.
Solution Approach 2:
Instead of forming electrical connections vertically through the chip substrate via through-silicon vias, the patent inverts the approach by forming connections laterally from the side walls of through-holes using wire bonds. This inversion changes the direction and method of electrical interconnection, reducing manufacturing complexity and cost.
3Area of stationary object
If chips are stacked with wire bonding to the board, then area savings are achieved, but the area consumed by wire bonds increases
Solution Approach 1:
The patent merges the functions of mechanical support, alignment, and electrical connection into a single integrated structure. The through-holes provide mechanical support and alignment, while wire bonds formed from their side walls provide electrical connection, eliminating the need for separate wire bond pads and reducing overall board area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the complexity and cost of chip stacking by eliminating the need for expensive vertical connections, enabling the creation of smaller, more efficient electronic devices with reduced material usage and alignment requirements.
Implementation Method 1
The second surface of the first substrate is bonded to the second surface of the second substrate
Implementation Method 2
using solder bumps and wire bonding to connect them directly to a printed circuit board
Implementation Method 3
using solder bumps and wire bonding to connect them directly to a printed circuit board
Data Source
AI summary
An integrated circuit assembly includes a first substrate and a second substrate, with active layers formed on the first surfaces of each substrate, and with the second surfaces of each substrate coupled together. A method of fabricating an integrated circuit assembly includes forming active layers on the first surfaces of each of two substrates, and coupling the second surfaces of the substrates together.