Back-End p-Type Transistor Materials for Stable Semiconductor Integration
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Solution Overview
Problem
Conventional back-end transistors in semiconductor devices are predominantly n-type, with p-type transistors being rare and unstable, leading to reliability issues.
Innovation Solution
Incorporating p-type transistors with stable channel materials like germanium or copper oxide in the back-end of semiconductor devices, alongside n-type transistors, to enhance stability and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If p-type transistors are used in back-end of semiconductor devices, then reliability and stability are improved, but manufacturing difficulty increases due to material stability issues
Solution Approach 1:
The patent changes the material parameter from conventional unstable p-type materials to stable p-type semiconductor materials such as tin oxide (SnO), copper oxide (Cu2O), nickel oxide (NiO), or their doped variants. This material substitution resolves the contradiction by providing p-type transistors that are both manufacturable and stable, eliminating the reliability issues associated with traditional p-type materials while maintaining ease of fabrication through standard semiconductor processing techniques.
2Productivity
If functional density is increased by scaling down geometry size, then production efficiency and cost are improved, but transistor stability deteriorates
Solution Approach 1:
The patent applies parameter changes by substituting unstable conventional p-type materials with stable oxide semiconductor materials. This enables continued scaling down of geometry size and increase in functional density without sacrificing transistor stability, as the new materials maintain their electrical properties even at reduced dimensions, thus resolving the contradiction between productivity improvement through scaling and reliability maintenance.
Data Source
AI summary
A semiconductor device includes a substrate, and a first transistor disposed on the substrate. The first transistor includes a first channel layer, a magnesium oxide layer, a first gate electrode, a first gate dielectric and first source/drain electrodes. A crystal orientation of the first channel layer is <100> or <110>. The magnesium oxide layer is located below the first channel layer and in contact with the first channel layer. The first gate electrode is located over the first channel layer. The first gate dielectric is located in between the first channel layer and the first gate electrode. The first source/drain electrodes are disposed on the first channel layer.


