Backgate Isolation Region for MOSFET Insulation
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Solution Overview
Problem
As MOSFETs are scaled down, the short channel effect becomes significant due to reduced gate length, leading to decreased threshold voltage and increased device resistance, and reliable electrical insulation between backgates and conductive vias of adjacent MOSFETs becomes challenging.
Innovation Solution
A semiconductor device with a backgate isolation region is implemented, where a PNP or NPN junction is formed by the backgates and a common backgate isolation region, using shallow trench isolations to electrically insulate adjacent MOSFETs, reducing the possibility of breakthrough and allowing for better insulation between backgate conductive vias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFETs are scaled down to improve integration level and reduce manufacturing cost, then device integration increases and cost decreases, but short channel effect becomes significant causing threshold voltage to decrease and device resistance to increase
Solution Approach 1:
The patent divides the backgate structure into multiple independently controllable backgates for adjacent MOSFETs, with each backgate separated by shallow trench isolations. This segmentation allows independent biasing of backgates to suppress short channel effects in scaled-down devices while maintaining high integration density.
Solution Approach 2:
The patent introduces shallow trench isolations as intermediary structures between adjacent backgates. These isolations act as mediators that provide electrical insulation between backgates while allowing each backgate to independently control its associated MOSFET channel, thus maintaining threshold voltage stability in scaled devices.
2Adaptability or versatility
If backgates are disposed under respective buried insulation layers to adjust threshold voltages, then threshold voltage control improves, but reliable electrical insulation between backgates of adjacent MOSFETs becomes challenging
Solution Approach 1:
The patent segments the continuous backgate region into discrete, isolated backgates using shallow trench isolations. This segmentation enables independent threshold voltage control for each MOSFET while the physical separation provided by the isolations ensures reliable electrical insulation between adjacent backgates.
Solution Approach 2:
The shallow trench isolations serve as intermediary structures that physically and electrically separate adjacent backgates. These isolations maintain the versatility of independent backgate control while providing the necessary electrical insulation to prevent interference between neighboring devices.
3Reliability
If shallow trench isolations are used to isolate adjacent MOSFETs, then electrical insulation between devices improves, but the complexity of forming PNP or NPN junctions with common backgate isolation region increases
Solution Approach 1:
The patent merges the isolation function with the backgate structure by forming the shallow trench isolations directly into the semiconductor substrate where they simultaneously serve as electrical isolators and define the boundaries of common backgate isolation regions. This integration reduces the number of separate processing steps required.
Solution Approach 2:
The shallow trench isolations perform multiple functions: they electrically isolate adjacent MOSFETs, define the boundaries of backgate regions, and enable the formation of PNP or NPN junctions with the common backgate isolation region. This multi-functionality reduces overall device complexity despite the sophisticated isolation mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively increases the threshold voltage, reduces device resistance, and enhances electrical insulation between MOSFETs, improving the overall performance and integration of MOSFETs on a wafer by forming a common backgate isolation region under the backgates of adjacent MOSFETs.
Implementation Method 1
respective backgate conductive vias of any two adjacent MOSFETs are electrically insulated from each other via a PNP junction or an NPN junction being formed by the backgates and the backgate isolation region
Data Source
AI summary
The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device comprises: an SOI wafer comprising a semiconductor substrate, a buried insulation layer, and a semiconductor layer, wherein the buried insulation layer is disposed on the semiconductor substrate, and the semiconductor layer is disposed on the buried insulation layer; a plurality of MOSFETs being formed adjacently to each other in the SOI wafer, wherein each of the MOSFETs comprises a respective backgate being formed in the semiconductor substrate; and a plurality of shallow trench isolations, each of which being formed between respective adjacent MOSFETs to isolate the respective adjacent MOSFETs from each other, wherein the respective adjacent MOSFETs share a common backgate isolation region under and in direct contact with the respective backgate in the semiconductor substrate, and a PNP junction or an NPN junction is formed by the common backgate isolation region and the respective backgate of the respective adjacent MOSFETs. According to the present disclosure, respective backgates of two adjacent MOSFETs are isolated from each other by the shallow trench isolation. Furthermore, the two adjacent MOSFETs are also isolated from each other by the PNP or NPN junction formed by the respective backgates of the two adjacent MOSFETs and the common backgate isolation. As a result, this device structure has a better insulation effect over the prior art MOSFET and it greatly reduces the possibility of breakthrough.