Semiconductor Impedance Calibration Using Background Resistor Sharing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As the number of semiconductor devices coupled to a shared external resistance for calibration increases, it becomes challenging to complete calibration operations within a specified time period, leading to potential impedance mismatches and data distortion, especially as systems grow and more devices are added, causing contention for shared calibration resources.
Innovation Solution
A calibration circuit that arbitrates among multiple semiconductor devices for use of the external resistance and performs calibration operations in the background, allowing for automatic application of calibration parameters without relying on memory controller commands, enabling continuous operation and reducing overall calibration time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor devices share a common external resistance for calibration, then the quantity of devices that can be calibrated is increased, but the calibration time for each device must be reduced to complete calibration before the time period expires
Solution Approach 1:
The patent implements background calibration that continuously performs calibration operations during normal memory operations. Instead of stopping all operations to perform calibration, the system continuously calibrates impedances in the background, ensuring calibration is always current without sacrificing operational time. This resolves the contradiction by making calibration time non-exclusive - calibration happens concurrently with normal operations.
Solution Approach 2:
The patent performs calibration operations in advance and maintains calibration parameters ready before they are needed. The system proactively calibrates impedances and stores calibration results, so when calibration is actually needed, the parameters are already available for immediate application. This eliminates waiting time and ensures calibration is always up-to-date without interrupting operations.
2Reliability
If calibration operations are performed sequentially for multiple devices, then contention for the shared external resistance is avoided, but the total calibration time increases beyond the specified time period
Solution Approach 1:
The patent performs calibration operations continuously in the background for all devices simultaneously rather than sequentially. Multiple devices undergo calibration at the same time by accessing the shared external resistance concurrently with proper arbitration, eliminating the need to wait for one device to complete before starting another. This reduces total calibration time while maintaining accuracy through continuous operation.
Solution Approach 2:
The patent merges calibration operations across multiple devices into a unified background process. Instead of separate sequential calibration routines for each device, the system combines all calibration activities into a single continuous operation that serves all devices simultaneously, reducing overall calibration time while ensuring all devices receive proper calibration.
3Reliability
If calibration parameters are applied only after completing all calibration operations, then impedance matching is ensured, but the time delay prevents timely application of calibration parameters
Solution Approach 1:
The patent applies calibration parameters as soon as they are determined, rather than waiting for all calibration operations to complete. The system proactively applies calibration results to devices immediately after calibration, ensuring impedance matching is established without delay. This preliminary application of parameters eliminates waiting time while maintaining reliability through continuous calibration updates.
Solution Approach 2:
The patent implements continuous calibration and parameter application, ensuring impedance matching is maintained at all times. Rather than performing a single batch calibration and then waiting, the system continuously calibrates and continuously applies parameters, eliminating gaps where impedance mismatches could occur and ensuring timely parameter application throughout operation.
Data Source
AI summary
Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.