Background Process Load Control for Lower Processor Power

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Solution Overview

Problem

Electronic devices experience high processor loads and power consumption due to abnormally-high-load processes, leading to freezing and heat generation, with existing solutions risking system abnormalities by directly killing these processes.

Innovation Solution

A method to reduce processor utilization rate of high-load background processes by controlling them to sleep periodically or adjust scheduling priority, avoiding direct process killing to minimize system disruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the processor utilization rate of high-load background processes is reduced, then power consumption is reduced and system performance is improved, but system stability may be affected

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements dynamic adjustment of processor utilization rate based on real-time monitoring of load and running duration. The system transitions from static process management to dynamic control, adjusting the processor utilization rate of background processes according to current system conditions, thereby reducing power consumption while maintaining system stability through adaptive rather than fixed thresholds.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms by continuously monitoring the load and running duration of background processes, and adjusting the processor utilization rate based on this feedback. The system uses preset thresholds as feedback criteria to determine when to reduce processor utilization, creating a closed-loop control system that balances power consumption and system stability through continuous monitoring and adjustment.

Inventive Principle:
Principle #23Feedback

2Use of energy by moving object

If background processes are directly killed to reduce processor load, then power consumption is reduced, but system abnormalities may occur

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem stability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

Instead of completely terminating background processes (excessive action), the patent applies partial action by reducing the processor utilization rate to below 100%. This partial reduction in resource allocation is sufficient to lower power consumption and processor load while maintaining the processes' continued operation, thereby avoiding system abnormalities that would result from complete process termination.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent treats processor utilization rate as a disposable parameter that can be temporarily reduced without permanently affecting the background processes. By making the processor resource allocation adjustable and temporarily reducible, the system can lower power consumption when needed while preserving the background processes for when full resources are required, avoiding the need to permanently kill processes.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Productivity

If the processor utilization rate of background processes is reduced, then foreground application performance is improved, but background process functionality may be compromised

Engineering Contradiction:
Improveforeground application performanceVSAvoidbackground process functionality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the resource allocation for foreground and background processes. Foreground processes maintain full processor utilization to ensure high performance and responsiveness, while background processes have their utilization rate reduced. This localized differentiation of resource quality allows foreground applications to perform optimally while background processes continue to function with reduced resources.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments processor resource allocation into different levels for different process types. By segmenting the processor utilization rate into foreground (high priority) and background (reduced priority) categories, the system can allocate resources differently to each segment, ensuring foreground applications receive sufficient resources for high performance while background processes operate with reduced resource consumption.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4280060B1Power consumption control method and apparatus
Publication Date: 2026.03.11 HONOR DEVICE CO LTD
  • EP4280060B1 patent drawingFigure 1A~1B
  • EP4280060B1 patent drawingFigure 2A
  • EP4280060B1 patent drawingFigure 2B

AI summary

Embodiments of this application relate to the technical field of terminals, and provide a power consumption control method and an apparatus. The method includes: detecting that a load of a process corresponding to a background application is higher than a preset load threshold and a running duration is greater than or equal to a preset duration threshold; determining that running of the background application is not perceived by a user; and reducing a duration for which the process corresponding to the background application uses processor resources within a unit duration, and reducing a processor utilization rate of the process. In this way, the occupation of processor resources by an abnormally-high-load background process can be reduced, the processor resources are released, a processor load is reduced, and processor power consumption is reduced, thereby improving processor performance.