Backplane Structure Capacitor Area Reduction
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Solution Overview
Problem
In high PPI display panels, particularly those using the bottom emission color filter on array (COA) scheme, the area occupied by capacitors in the AMOLED pixel driving circuit is significant, hindering the reduction of pixel size while maintaining storage capacity.
Innovation Solution
A backplane structure with a three-layered capacitance configuration, utilizing a substrate, conductive films, and insulation layers to form a capacitor structure without adding new material layers, reducing the capacitor's area by optimizing the overlap and placement of conductive films and electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional capacitor structure is used in AMOLED pixel driving circuit, then the storage capacity is maintained, but the area occupied by the capacitor is large
Solution Approach 1:
The patent transitions from a conventional planar capacitor structure to a three-dimensional stacked capacitor structure by introducing multiple conductive films (first conductive film, second conductive member, third conductive film, fourth conductive member, and fifth conductive member) arranged in vertical layers. This vertical stacking approach utilizes the third dimension (height) to increase capacitance without expanding the horizontal footprint on the substrate, thereby reducing the capacitor area while maintaining storage capacity.
Solution Approach 2:
The patent implements a nested structure where multiple conductive films and insulation layers are stacked within each other to form a compact capacitor. The first conductive film is positioned on the substrate, followed by insulation layers and additional conductive films (second conductive member, third conductive film, fourth conductive member, and fifth conductive member) arranged in a nested configuration. This nested arrangement maximizes the use of vertical space, allowing multiple capacitor elements to occupy a minimal planar area while maintaining the required storage capacity.
2Productivity
If the pixel area is reduced for high PPI display panel, then the pixel density is improved, but the capacitor area proportion increases
Solution Approach 1:
By stacking conductive films vertically (first conductive film on substrate, third conductive film above it, fifth conductive member at the top), the patent creates a three-dimensional capacitor structure that fits within the reduced pixel area. This vertical arrangement allows the capacitor to maintain adequate capacitance value without occupying excessive horizontal space, enabling high pixel density while controlling the capacitor area proportion within each pixel.
3Area of stationary object
If the capacitor area is reduced, then the pixel area is reduced for high PPI, but the manufacturing complexity increases
Solution Approach 1:
The patent combines multiple capacitor elements into a single integrated stacked structure within the pixel driving circuit. By merging the first conductive film, second conductive member, third conductive film, fourth conductive member, and fifth conductive member into one unified capacitor assembly with alternating conductive and insulation layers, the design achieves space efficiency without proportionally increasing manufacturing complexity. This integrated approach allows the capacitor to be fabricated as part of the overall pixel structure rather than as separate components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the capacitor's area while maintaining constant capacitance, facilitating higher pixel density, reducing the risk of short circuits, and improving manufacturing yield for higher PPI display panels.
Implementation Method 1
form a three-layered capacitance structure
Implementation Method 2
the third conductive film is disposed between the first conductive film and the second conductive member in an insulation manner
Data Source
AI summary
A backplane structure containing a capacitor includes a substrate, a first conductive film disposes on the substrate, a second conductive member having one portion spaced apart from the first conductive film and another portion connected to the first conductive film, a third conductive film spaced apart from the first conductive film and the second conductive member, a fourth conductive member connected to the third conductive film, and a fifth conductive member having one portion connected to the fourth conductive member and another portion spaced apart from the second conductive member. The third conductive film is disposed between the first conductive film and the second conductive member in an insulation manner, and the second conductive member is disposed between the third conductive film, the fourth conductive member, and the fifth conductive member in an insulation manner.