Backplane Substrate Vertical Transistor Integration High Resolution
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Solution Overview
Problem
In high-resolution display devices, such as those for augmented or virtual reality, the small size of each pixel limits the integration of driving and switching thin-film transistors, leading to rapid saturation of the driving transistor and difficulty in achieving sufficient gradation expression.
Innovation Solution
A backplane substrate design where the driving thin-film transistor has a bottom gate shape with an offset area and the switching thin-film transistor has a top gate shape, allowing for vertical connection and differing construction and operation, enabling high gradation expression and rapid response speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the size of each pixel is reduced to achieve high resolution, then the display resolution is improved, but the driving thin-film transistor becomes saturated quickly and sufficient gradation expression becomes difficult
Solution Approach 1:
The patent transitions from planar connection to vertical connection by stacking transistors in the thickness direction. This dimensional change allows the driving transistor and switching transistor to be connected vertically rather than horizontally, reducing the area required in the pixel plane and preventing rapid saturation while maintaining high resolution.
Solution Approach 2:
The patent implements a stacked structure where the driving thin-film transistor and switching thin-film transistor are nested vertically within the same pixel area. The switching transistor is positioned above the driving transistor, with their source/drain regions vertically aligned, creating a compact nested configuration that solves the saturation problem.
2Ease of operation
If additional connection patterns are provided to connect transistors with the same stack structure, then the transistors can be connected, but circuit integration is limited and ultra-high resolution is difficult to achieve
Solution Approach 1:
The patent eliminates the need for additional planar connection patterns by connecting transistors vertically through the thickness direction. The source/drain regions of the driving transistor are vertically aligned with the source/drain regions of the switching transistor, allowing direct vertical connection without requiring extra connection patterns in the pixel plane.
Solution Approach 2:
The patent merges the connection function into the vertical stacking structure itself. The vertical alignment of source/drain regions between the driving and switching transistors serves both as the transistor structure and as the connection path, combining structural and connective functions into a single integrated design.
Data Source
AI summary
Disclosed are a backplane substrate that is capable of expressing high gradation even through a small pixel, a method of manufacturing the same, and an organic light-emitting display device using the same. Integration for ultra-high resolution is possible through structural modification.