Backside Interconnect Air Spacers for Dense Semiconductor Routing

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, they face challenges such as increased capacitive coupling between conductive lines, which limits device speed and integration density, and existing solutions do not effectively address these issues.

Innovation Solution

The implementation of air spacers in the backside interconnect structure, formed by etching a dielectric layer and depositing additional layers to create isolation between conductive lines, reduces capacitive coupling and allows for increased device speeds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature size is reduced to increase integration density, then more components can be integrated into a given area, but capacitive coupling between conductive lines increases which limits device speed

Engineering Contradiction:
Improveintegration densityVSAvoiddevice speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

Air spacers are introduced as intermediary structures between adjacent conductive lines in the backside interconnect layer. These spacers create physical separation and reduce the capacitive coupling effect between neighboring power and ground lines, thereby maintaining high device speed while enabling increased integration density through closer line spacing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different dielectric materials with varying capacitance characteristics to different regions of the interconnect structure. Low-k dielectric materials are strategically placed in regions where capacitive coupling is most problematic, while air spacers are used in critical areas requiring maximum isolation, creating localized quality variations that optimize both speed and integration density.

Inventive Principle:
Principle #3Local quality

2Productivity

If conductive lines are placed closer together to increase integration density, then more components can be integrated, but capacitive coupling increases reducing device performance

Engineering Contradiction:
Improveintegration densityVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Air spacers serve as intermediary isolation structures positioned between adjacent conductive lines in the backside interconnect layer. By introducing this intermediate air layer, the patent reduces direct capacitive coupling between power and ground lines, enabling closer line spacing for higher integration density while maintaining device performance and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs composite dielectric structures combining multiple materials with different electrical properties. Air spacers (effectively a vacuum/air dielectric with k≈1) are combined with low-k dielectric materials to create a composite isolation system that provides superior capacitive coupling reduction compared to single-material approaches, enabling high-density interconnects with maintained performance.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The air spacers improve isolation between conductive lines, reducing capacitive coupling and enabling higher device speeds and increased integration density in semiconductor devices.

Implementation Method 1

etching a dielectric layer and depositing additional layers to form spacers

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

depositing a second dielectric layer over the first dielectric layer and the conductive lines

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS11915972B2Methods of forming spacers for semiconductor devices including backside power rails
Publication Date: 2024.02.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11915972B2 patent drawing
  • US11915972B2 patent drawing
  • US11915972B2 patent drawing

AI summary

Semiconductor devices including air spacers formed in a backside interconnect structure and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure; a front-side interconnect structure on a front-side of the first transistor structure; and a backside interconnect structure on a backside of the first transistor structure, the backside interconnect structure including a first dielectric layer on the backside of the first transistor structure; a first via extending through the first dielectric layer, the first via being electrically coupled to a first source/drain region of the first transistor structure; a first conductive line electrically coupled to the first via; and an air spacer adjacent the first conductive line, the first conductive line defining a first side boundary of the air spacer.