Backside Bond Pads for Memory Arrays Using TSV Routing
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Solution Overview
Problem
Conventional memory devices with bond pads located on the frontside of the memory array face issues of increased stress and damage to the array due to the bond pad's presence, occupying valuable substrate area and potentially compromising the device's stability and durability.
Innovation Solution
The bond pad is relocated to the backside of the memory die, connected to the control circuitry via a through-silicon via (TSV), eliminating the need for extra wafer space and protecting the memory array from stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If bond pads are located on the frontside of the memory array, then control and data signals can be provided to and from the memory device, but the bond pads occupy valuable substrate area and increase stress on the memory array
Solution Approach 1:
The bond pads are relocated from the frontside (first surface) of the substrate to the backside (second surface) of the substrate. This spatial relocation to another dimension (from front to back surface) allows the bond pads to no longer occupy substrate area on the frontside, thereby resolving the contradiction between signal transmission capability and substrate area occupation.
2Ease of operation
If bond pads are located on the frontside of the memory array, then control and data signals can be provided to and from the memory device, but the bond pads potentially compromise the device's stability and durability
Solution Approach 1:
By moving the bond pads to the backside of the substrate through a through-silicon via (TSV), the bond pads are separated from the memory array on the frontside. This dimensional separation eliminates the stress and potential damage that bond pads on the frontside would cause to the memory array, thereby improving device stability and durability while maintaining signal transmission capability.
3Ease of operation
If bond pads are located on the frontside of the memory array, then control and data signals can be provided to and from the memory device, but the bond pads face issues of increased stress and damage to the array
Solution Approach 1:
The bond pads are relocated to the backside of the substrate, connected to the control circuitry via a through-silicon via (TSV). This relocation to another dimension (backside vs. frontside) physically separates the bond pads from the memory array, eliminating the harmful stress and damage that would occur if bond pads were present on the frontside near the memory array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the overall die footprint, enhances stability, and prevents potential damage to the memory array, resulting in a more durable and efficient memory device.
Implementation Method 1
The bond pad is relocated to the backside of the memory die, connected to the control circuitry via a through-silicon via (TSV)
Data Source
AI summary
An apparatus is provided, comprising a substrate with a frontside and a backside opposite the frontside; control circuitry disposed over the frontside of the substrate; a memory array disposed over and electrically coupled to the control circuitry; a through-silicon via (TSV) disposed under the memory array, the TSV extending through the substrate from the control circuitry to the backside of the substrate; and a bond pad disposed on the backside of the substrate and electrically coupled to the control circuitry via the TSV.