Backside Buried Interconnect Layout for Mixed Semiconductor Regions
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving increased integration and efficient manufacturing due to limitations in back end of line (BEOL) interconnections and power distribution networks, particularly in the integration of transistors and memory devices on substrates.
Innovation Solution
The semiconductor device incorporates a substrate with distinct regions, featuring front-side and back-side interconnection structures, including buried conductive layers and insulating layers, through-electrodes, and epitaxial layers, which enable efficient electrical connections and power distribution across the substrate, allowing for increased integration and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If back side buried interconnection structure is disposed in all regions, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by selectively disposing the back side buried interconnection structure only in the first region where front side devices are located, while omitting it in the second region where back side devices are located. This regional differentiation optimizes electrical connectivity where needed while reducing unnecessary complexity in regions where it is not required.
2Adaptability or versatility
If substrate thickness is increased to accommodate multiple device types, then device integration is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the substrate into distinct first and second regions with different device configurations. The first region accommodates front side devices with buried conductive layers, while the second region accommodates back side devices without such layers. This segmentation allows different device types to coexist on the same substrate while maintaining manageable manufacturing precision requirements for each region.
3Reliability
If buried conductive layer penetrates through device isolation layer, then electrical connection reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements preliminary action by forming the buried conductive layer to extend deeper than the device isolation layer during the initial fabrication process. This preliminary deep extension ensures reliable electrical connections are established before subsequent processing steps, eliminating the need for additional corrective operations and reducing overall manufacturing complexity despite the deeper initial structure.
Data Source
AI summary
A semiconductor device, includes: a substrate having a first region and a second region; a first device on the substrate, in the first region; a second device on the substrate, in the second region; a front side interconnection structure including a plurality of interconnection layers electrically connected to the first device and the second device, on a front side of the substrate; and a back side buried interconnection structure adjacently to a back side of the substrate opposing the front side. The back side buried interconnection structure includes a back side buried insulating layer in a trench recessed from a back side of the substrate toward the front side of the substrate, and a back side buried conductive layer in the back side buried insulating layer. The back side buried interconnection structure is located in the first region or the second region.