Backside CMOS Wafer Contacts for Transparent Flow Cell Sensing
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Solution Overview
Problem
Existing flow cells with CMOS sensors face challenges due to non-transparent or light-blocking top layers, which hinder the performance of fluorescent detection systems by obstructing excitation or emission light paths, and the manufacturing process is complicated by the need for thin silicon wafers and through-silicon vias (TSVs).
Innovation Solution
A method is developed to manufacture a flow cell with a CMOS sensor system that includes forming through-silicon vias, creating fan-out regions, and depositing metallization layers to maximize the active sensor area, while using TSVs to connect electrical contacts on the backside of the CMOS sensor, avoiding bumps on the active surface to maintain transparency and functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bumps are formed on the front side of CMOS detector to enable electrical connections, then electrical connectivity is achieved, but the active surface transparency and light detection functionality are adversely impacted
Solution Approach 1:
The patent inverts the conventional approach by forming electrical connections (bumps) on the backside of the CMOS detector instead of the front side. This allows the front active surface to remain completely transparent and free of obstructions, while electrical connectivity is achieved through backside contacts that connect to pads via through-silicon vias (TSVs).
Solution Approach 2:
The patent moves electrical connections from the two-dimensional front surface plane to the three-dimensional backside of the detector. By utilizing the vertical dimension through TSVs that penetrate the silicon substrate, electrical connections are established without occupying any space on the light-sensitive active surface.
2Reliability
If silicon wafer is thinned to 70-140 um thickness to accommodate TSV structure, then electrical connections through substrate are enabled, but wafer handling becomes challenging
Solution Approach 1:
The patent performs wafer thinning and TSV formation as preliminary actions while the wafer is still bonded to the carrier glass. This preliminary processing allows the use of standard thick-wafer handling techniques during manufacturing, avoiding the difficulties of handling thin, fragile wafers until the final stages of the process.
Solution Approach 2:
The carrier glass acts as an intermediary support structure that provides mechanical strength and stability to the thin silicon wafer during manufacturing processes. The wafer remains bonded to this rigid carrier throughout processing, eliminating handling challenges associated with thin wafers, and is only separated when no longer needed for support.
3Measurement precision
If optical system with lenses and filters is used for fluorescent detection, then detection capability is achieved, but device size and cost increase
Solution Approach 1:
The patent replaces the mechanical optical system (lenses, filters, light sources) with a solid-state CMOS detector that directly converts light signals into electrical signals. This substitution eliminates the need for complex optical components, significantly reducing device size and complexity while maintaining fluorescent detection capability through the detector's inherent photodetection properties.
Data Source
AI summary
Provided herein include various examples of a method for manufacturing aspects of an apparatus, a sensor system. The method may include obtaining a first carrier bonded to an upper surface of the silicon wafer. This wafer includes through silicon vias (TSVs) extended through openings in a passivation stack, with electrical contacts coupled to portions of the TSVs exposed through these openings. The method may include de-bonding the first carrier from the upper surface of the silicon wafer. The method may include dicing the silicon wafer into subsections comprising dies.