Backside Conductive Path for Plasma Damage-Resistant Semiconductor Structures
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Solution Overview
Problem
As semiconductor integrated circuits continue to scale down, forming backside vias and power line connections can lead to charge accumulation during etching processes, causing damage to the integrated circuit device.
Innovation Solution
A method is introduced that involves attaching a carrier piece with a metal feature over a workpiece, allowing the metal feature to be electrically coupled to frontside conductive features. This creates a conductive path that releases electrical charges induced by plasma etching, reducing or eliminating plasma-induced damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If backside vias and power line connections are formed on the semiconductor substrate, then spacing management is improved and power consumption is optimized, but charge accumulation during etching causes damage to the integrated circuit device
Solution Approach 1:
A carrier substrate is introduced as an intermediary component between the semiconductor substrate and the etching environment. The carrier substrate includes a conductive layer that acts as a charge sink to capture and dissipate charges generated during plasma etching, preventing charge accumulation damage to the semiconductor device while enabling backside via formation
2Productivity
If plasma etching is performed to form backside vias, then the etching process can be completed, but electrical charges accumulate and cause plasma-induced damage to the device
Solution Approach 1:
The harmful plasma charges generated during etching are converted into a beneficial effect by directing them to the conductive layer on the carrier substrate. The conductive layer acts as a charge sink that safely dissipates the plasma-induced charges, transforming the harmful charge accumulation into a controlled charge dissipation mechanism that protects the semiconductor device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The conductive path effectively discharges electrical charges during plasma etching, reducing damage to the semiconductor device, enhancing the etching process window, and improving device reliability.
Implementation Method 1
forming a conductive path that releases electrical charges induced by plasma etching
Implementation Method 2
performing a plasma etching process to a back side of the substrate
Data Source
AI summary
A method includes attaching a second workpiece to a first workpiece, performing a first plasma etching process to a back side of the first workpiece to form a first trench, and forming a first backside conductive feature in the first trench. The first workpiece includes a first transistor including a source/drain (S/D) feature, a second transistor adjacent to the first transistor and comprising a gate structure, a diode, and an interconnect structure including a plurality of metal lines and vias. A first interconnect layer of the interconnect structure includes a metal line electrically coupled to the gate structure and the S/D feature. The second workpiece includes a first dielectric layer, a metal feature extending through the first dielectric layer, and a carrier substrate disposed over the first dielectric layer. The metal feature is electrically coupled to the gate structure by the diode and the plurality of metal lines and vias.