Backside Source/Drain Contact Cavity Shaping to Prevent Voids
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Solution Overview
Problem
The challenge in forming backside contacts for transistors is the formation of voids and seams due to the increasing width of the trench from the backside to the frontside of the transistor, which affects the reliability of the backside contact.
Innovation Solution
A second removal process using a wet etch is performed to form a wide cavity below the channel structures, which has a larger maximum width than the trench, thereby reducing the likelihood of voids and seams in the backside contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a trench is formed for the backside contact, then the backside contact can be established, but voids and seams form due to the increasing width of the trench from backside to frontside
Solution Approach 1:
The patent inverts the conventional trench formation approach by forming the cavity from the frontside upward rather than from the backside downward. This reversal allows the cavity to be formed with a uniform width that matches the source/drain region, preventing voids and seams in the backside contact while maintaining reliable electrical connection.
Solution Approach 2:
The patent performs preliminary actions by forming the cavity and filling it with conductive material before finalizing the backside contact structure. This preliminary formation of the cavity with controlled dimensions ensures that subsequent backside contact deposition occurs on a uniform substrate, eliminating voids and seams.
2Adaptability or versatility
If the trench width increases from backside to frontside, then the backside contact can accommodate the source/drain region, but voids and seams are formed affecting contact reliability
Solution Approach 1:
The patent applies local quality by forming the cavity with a width that precisely matches the source/drain region dimensions at the local level. This localized precision ensures that the conductive material fills the cavity uniformly without creating voids or seams, while still accommodating the source/drain region geometry.
Solution Approach 2:
The patent changes the geometric parameters of the cavity formation process, specifically controlling the cavity width to be uniform and match the source/drain region width. This parameter control prevents the width variation that would otherwise cause voids and seams, maintaining contact reliability while adapting to the source/drain geometry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a backside contact with a width that continuously decreases from the backside to the source/drain region, mitigating voids and seams, and enhancing the reliability of the backside contact and overall transistor device.
Implementation Method 1
A second removal process using a wet etch is performed to form a wide cavity below the channel structures
Data Source
AI summary
In some embodiments, the present disclosure relates to an integrated chip that includes a channel structure extending between a first source/drain region and a second source/drain region. Further, a gate electrode is arranged directly over the channel structures, and an upper interconnect contact is arranged over and coupled to the gate electrode. A backside contact is arranged below and coupled to the first source/drain region. The backside contact has a width that decreases from a bottommost surface of the backside contact to a topmost surface of the backside contact.