Backside Contact Structure Using Etch-Selective Dielectrics
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Solution Overview
Problem
Current backside contact formation techniques in semiconductor manufacturing lack precision and accuracy, leading to alignment errors and short-circuiting issues due to tight spacing in densely packed integrated circuits, particularly with EUV lithography techniques.
Innovation Solution
The use of multiple etch selective materials with different etch selectivity allows for a more forgiving process, preventing shorting between conductive structures through the use of dielectric or non-conductive spacers, enabling precise backside contact formation in stacked and non-stacked transistor configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If backside contacts are used to increase transistor density, then device density is improved, but alignment precision deteriorates due to tight spacing
Solution Approach 1:
The patent introduces etch selective materials as intermediary layers between the backside contact structures and the underlying semiconductor features. These intermediary materials with different etch selectivities enable precise differentiation and alignment of contact regions during the etching process, solving the alignment precision problem while maintaining high device density
Solution Approach 2:
The patent segments the backside contact formation process into multiple distinct etching steps, each targeting specific regions defined by different etch selective materials. This segmentation allows independent optimization of each contact region's alignment, preventing shorting between adjacent contacts while achieving high transistor density
2Quantity of substance
If tighter spacing is used to increase device density, then transistor density is improved, but shorting risk increases
Solution Approach 1:
The patent applies different etch selective materials to different local regions of the backside contact structure. This local differentiation ensures that each contact region can be precisely defined and isolated from its neighbors, preventing shorting even when contacts are closely spaced to achieve high device density
Solution Approach 2:
Etch selective materials serve as intermediary protective layers that prevent unwanted electrical connections between adjacent contacts. By selectively removing these intermediary materials in a controlled sequence, the patent ensures proper isolation between contacts while maintaining tight spacing for high density
3Ease of manufacture
If conventional lithography is used for backside contact formation, then manufacturing simplicity is maintained, but alignment accuracy deteriorates
Solution Approach 1:
The patent replaces reliance on lithographic alignment (mechanical/optical positioning) with chemistry-based differentiation through etch selective materials. This substitution allows alignment to be determined by chemical properties rather than lithographic precision, maintaining manufacturing simplicity while dramatically improving alignment accuracy
Solution Approach 2:
The patent changes the controlling parameter for alignment from lithographic dimensions to etch selectivity ratios. By using materials with vastly different etch rates and selectivities, the patent achieves precise alignment control through chemical parameters rather than mechanical lithographic parameters, solving the accuracy-simplicity contradiction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the precision and accuracy of backside contact formation, reducing manufacturing delays and yield loss by preventing electrical shorting, thus improving the reliability of densely packed semiconductor devices.
Implementation Method 1
The techniques use two or more etch selective materials to facilitate backside contact formation
Data Source
AI summary
Backside contact structures include etch selective materials to facilitate backside contact formation. An integrated circuit structure includes a frontside contact region, a device region below the frontside contact region, and a backside contact region below the device region. The device region includes a transistor. The backside contact region includes a first dielectric material under a source or drain region of the transistor, a second dielectric material laterally adjacent to the first dielectric material and under a gate structure of the transistor. A non-conductive spacer is between the first and second dielectric materials. The first and second dielectric materials are selectively etchable with respect to one another and the spacer. The backside contact region may include an interconnect feature that, for instance, passes through the first dielectric material and contacts a bottom side of the source/drain region, and/or passes through the second dielectric material and contacts the gate structure.