Multi-Stage Backside Contact Layout to Prevent Gate Shorts

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Solution Overview

Problem

Conventional self-aligned backside contacts in semiconductor devices often result in backside contact to gate short concerns due to their increased height, which can lead to poor overlay margins and electrical shorts.

Innovation Solution

A multi-stage backside contact formation method is introduced, which includes a backside patterning stack and a multi-stage patterning process that selectively removes portions of the stack without affecting the shallow trench isolation (STI) liner, allowing for a reduced distance between the backside contact and the gate, thereby mitigating the risk of electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional self-aligned backside contacts are formed, then overlay margin is improved, but electrical short risk increases due to increased contact height

Engineering Contradiction:
Improveoverlay marginVSAvoidelectrical short risk
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The backside contact formation is divided into multiple stages with different etch depths. The first stage forms contacts to a first depth, the second stage forms contacts to a greater second depth, and the third stage forms contacts to an even greater third depth. This segmentation allows precise control of contact height and positioning, achieving good overlay margin while preventing electrical shorts by stopping etching at appropriate depths before contacting the gate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The STI liner is formed on the shallow trench isolation regions before the multi-stage backside contact patterning process. This preliminary action creates a protective barrier that prevents over-etching during subsequent etching stages, ensuring that contacts do not penetrate too deeply and cause electrical shorts to the gate, while still allowing contacts to reach the required depth for proper electrical connection.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multi-stage backside contact patterning is performed, then electrical short risk is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical short riskVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The STI liner serves multiple functions: it protects the shallow trench isolation regions from over-etching during the multi-stage backside contact patterning process, and it also serves as a stopping layer to prevent electrical shorts to the gate. This multi-functionality simplifies the overall process by using a single structure for multiple protective and functional purposes, reducing the need for additional process steps.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The multi-stage backside contact patterning process is nested within the existing semiconductor fabrication process flow, with the STI liner formation integrated into the isolation structure creation. The sequential etching stages are nested within each other, with each stage building upon the previous stage's results, allowing complex multi-stage patterning to be achieved through a structured, organized approach that manages manufacturing complexity.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS20240429103A1Backside contact mitigating contact to gate short
Publication Date: 2024.12.26 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240429103A1 patent drawing
  • US20240429103A1 patent drawing
  • US20240429103A1 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate including shallow trench isolation (STI) regions, a semiconductor fin between the STI regions, and a STI liner on an upper surface of the STI regions. A STI layer is in each of the STI regions, and includes a liner opening exposing a portion of the STI layer. A source/drain is on a sidewall of the semiconductor fin. A multi-stage backside contact is on the source/drain and contacting the portion of the STI layer via the liner opening.