Backside Contact Structure for Stacked MOSFET Leakage Isolation

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Solution Overview

Problem

As semiconductor devices are scaled down, the operating characteristics of MOSFETs are deteriorated, leading to challenges in achieving high integration and performance, particularly due to size reduction limitations.

Innovation Solution

A semiconductor device design incorporating an insulating substrate, silicon layer, dopant layer, buried spacers, channel patterns, source/drain patterns, and a gate electrode with inner electrodes, along with a backside contact to improve electrical characteristics by preventing leakage current and short circuit phenomena.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If MOSFET size is reduced to achieve high integration, then device density increases, but operating characteristics deteriorate

Engineering Contradiction:
Improvedevice integration densityVSAvoidoperating characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a backside contact structure that penetrates the insulating substrate from the rear surface, transitioning the connection dimension from planar (top-side only) to three-dimensional. This allows electrical connection without occupying additional planar area, thereby maintaining high integration density while improving device performance through reduced leakage paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The backside contact acts as an intermediary element that mediates between the lower power interconnection line and the source/drain pattern. By introducing this intermediate conductive structure through the substrate, the patent enables electrical connection while isolating the signal path from harmful leakage currents that would otherwise occur through the insulating substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional top-side contact structure is used, then manufacturing is simple, but leakage current and short circuits occur

Engineering Contradiction:
Improvecontact structure fabricationVSAvoidleakage current and short circuits
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent inverts the conventional contact structure by placing the contact opening and connection on the backside of the insulating substrate rather than the front side. This inversion allows the contact to be formed after the transistor structure is complete, avoiding interference with gate patterning and reducing leakage current paths through the substrate.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent segments the contact structure into multiple components: a backside contact opening formed through the insulating substrate, a backside contact plug filling the opening, and connection to the source/drain pattern. This segmentation allows each component to be optimized independently and reduces the risk of short circuits between different electrical elements.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250006830A1Semiconductor device
Publication Date: 2025.01.02 SAMSUNG ELECTRONICS CO LTD
  • US20250006830A1 patent drawing
  • US20250006830A1 patent drawing
  • US20250006830A1 patent drawing

AI summary

A semiconductor device includes an insulating substrate, a silicon layer on the insulating substrate, a dopant layer on the silicon layer, a buried spacer on a side surface of the dopant layer, a channel pattern on the dopant layer, the channel pattern comprising a plurality of semiconductor patterns vertically stacked and spaced apart from each other, a source/drain pattern on the buried spacer, the source/drain pattern connected to the channel pattern, a gate electrode on the channel pattern, the gate electrode comprising a plurality of inner electrodes between the semiconductor patterns, respectively, a lower power interconnection line in a lower portion of the insulating substrate, and a backside contact extending into the insulating substrate and the silicon layer to electrically connect the lower power interconnection line to the source/drain pattern. A side surface of the backside contact is in contact with the silicon layer and the buried spacer.