Backside Contact Layout for Dense Nanosheet Logic Structures

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Solution Overview

Problem

Nanosheet technology faces issues with device interference and spacing problems as devices scale down, leading to shorts due to contact formation challenges between adjacent components.

Innovation Solution

A microelectronic structure with a first device on a dielectric layer and a second device on a substrate layer, where the dielectric layer and substrate are substantially similar, allowing for backside contact formation without connecting to the second device, by flipping the first substrate for processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If devices are scaled down and placed closer together to increase device density, then device density is improved, but device interference and spacing issues occur leading to shorts

Engineering Contradiction:
Improvedevice densityVSAvoiddevice interference and spacing issues
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent transitions from planar contact formation to three-dimensional backside contact formation. By forming contacts on the backside of the substrate rather than on the front surface, the contact points are moved to a different spatial dimension, allowing devices to be placed closer together on the front surface without interfering with contact formation. This dimensional change resolves the spacing conflict between high device density and contact reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional frontside contact formation is used, then contact formation is straightforward, but spacing issues with adjacent components lead to shorts

Engineering Contradiction:
Improvecontact formation processVSAvoidspacing issues and shorts
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent inverts the conventional contact formation approach by forming contacts on the backside of the substrate instead of on the front surface. This inversion allows contact pads to be positioned away from the active device regions, eliminating spacing conflicts and short circuits between adjacent components while maintaining ease of manufacturing through standard backside processing techniques.

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If backside contact formation is implemented, then spacing issues are resolved, but additional processing steps are required

Engineering Contradiction:
Improvespacing issues resolvedVSAvoidprocessing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple processing steps into a unified backside contact formation process. By integrating contact pad formation, via etching, and metallization into a single backside processing sequence, the patent resolves spacing issues while minimizing the increase in device complexity. The merged process leverages standard semiconductor fabrication techniques that can be performed in existing manufacturing lines.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12557353B2Method and structure for a logic device and another device
Publication Date: 2026.02.17 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12557353B2 patent drawing
  • US12557353B2 patent drawing
  • US12557353B2 patent drawing

AI summary

A method including forming an oxide layer on a first substrate and forming a second substrate on the oxide layer. Doping a first section of the second substrate while not doping a second section of the second substrate. Forming a first nano device on the second section of the second substrate and forming a second nano device on first section of the second substrate. Flipping the first substrate over to allow for backside processing of the substrate and forming at least one backside contact connected to the first nano device while backside contacts are not formed or connected to the second nano device.