Backside Contact Structure for Low-Resistance CMOS Ohmic Contacts
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Solution Overview
Problem
As integrated circuits scale down in size, forming effective contacts to transistor elements like the source and drain regions becomes challenging, leading to higher contact resistance and impacting transistor performance, with silicide alone often being insufficient for increasing transistor performance demands.
Innovation Solution
Implementing different backside contact structures for n-channel and p-channel devices, utilizing a combination of phosphorous-doped titanium, scandium, and molybdenum layers for n-channel devices, and molybdenum or boron-doped titanium layers for p-channel devices, to enhance ohmic contact and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integrated circuits are scaled down in size, then device density and integration are improved, but contact resistance increases and transistor performance deteriorates
Solution Approach 1:
The patent applies composite material structures by combining multiple conductive layers with different properties (silicide layer, scandium layer, and titanium layer) to create a contact structure that achieves both low resistance and scalability. The scandium layer provides enhanced ohmic contact, while the silicide and titanium layers provide structural stability and conductivity, resolving the contradiction between miniaturization and contact performance.
Solution Approach 2:
The patent implements local quality by applying different material compositions and doping levels at specific contact regions versus bulk regions. The contact structures use phosphorous-doped titanium and selectively doped regions to optimize electrical properties locally at the contact interface, allowing the overall device to be scaled down while maintaining high-quality contacts at critical locations.
2Ease of manufacture
If silicide alone is used for contacts, then manufacturing simplicity is maintained, but transistor performance enhancement is insufficient
Solution Approach 1:
The patent transitions from single-material silicide contacts to composite contact structures incorporating scandium, titanium, and silicide layers. This composite approach enables superior electrical performance with controlled resistance characteristics while maintaining compatibility with existing semiconductor manufacturing processes through sequential deposition techniques.
Solution Approach 2:
The patent employs parameter changes by adjusting doping concentrations, layer thicknesses, and material compositions to optimize contact performance. Phosphorous doping in titanium layers and controlled scandium layer thicknesses allow tuning of electrical properties to achieve desired resistance levels while maintaining ease of manufacture through standard semiconductor processing.
Data Source
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AI summary
Techniques are provided to form an integrated circuit having different semiconductor devices with different backside contact structures. Field effect transistors (FETs) each includes semiconductor material extending in a first direction between source and drain regions, and gate structures extending in a second direction around the semiconductor material of each FET. Different contact structures are formed on the source or drain regions of the n-channel FETs compared to the p-channel FETs. A backside contact structure on an n-channel source or drain region includes a first layer of phosphorous-doped titanium, a second layer that includes scandium, and a third layer that includes a metal, such as molybdenum. A backside contact structure on a p-channel source or drain region may include only a layer of metal, such as molybdenum, or the layer of metal and a layer of boron-doped titanium. The contact structures may be used to provide enhanced ohmic contact.