Backside Contact Placeholder Templating for Nanoribbon FET Precision
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Solution Overview
Problem
Current techniques for forming backside contact placeholders in advanced transistor structures, such as GAA and nanoribbon transistors, face challenges in controlling the dimensions and processing of metal recesses, leading to high variation and difficulty in achieving precise contact placement.
Innovation Solution
The use of dielectric materials like carbon hardmask for recess processing, followed by templated bottom-up growth or spatially confined deposition to form backside contact placeholders, which are then replaced with metal contacts, providing improved process control and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If metal recess processing is used to form backside contact placeholders, then the placeholders can be created for backside contact access, but the depth control and dimensional precision of the placeholders deteriorate due to high variation and processing difficulty
Solution Approach 1:
The patent introduces an intermediary material (dielectric material such as carbon hardmask) between the metal fill and the final contact placeholder. The process involves filling openings with dielectric material, patterning and recessing the dielectric to form templates, then using these templates to define metal placeholder regions. This intermediary approach transforms the difficult metal recess operation into easier dielectric recess operations, achieving better depth control and dimensional precision while maintaining ease of manufacture
Solution Approach 2:
The patent performs preliminary actions by first forming dielectric templates through recess processing before creating the final metal contact placeholders. The dielectric material is recessed to the desired depth and pattern in advance, creating a template that guides subsequent metal deposition. This preliminary template formation ensures that the final metal placeholders achieve the required dimensional precision without requiring precise metal recess control
2Productivity
If advanced transistor structures like GAA and nanoribbon are deployed, then transistor density and performance improve, but the complexity of forming precise backside contacts increases
Solution Approach 1:
The patent segments the contact formation process into distinct stages: dielectric fill, dielectric patterning and recess, template formation, and metal placeholder deposition. This segmentation allows each step to be optimized independently, reducing overall process complexity while enabling the formation of precise backside contacts in advanced high-density transistor structures
Solution Approach 2:
The dielectric template serves as an intermediary that simplifies the overall process complexity. By using the dielectric material to define the placeholder geometry first, the patent avoids the need for complex direct metal patterning and recess operations, thereby reducing device complexity in the contact formation process while maintaining high transistor density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for precise and controlled formation of backside contacts, reducing resistance and enhancing transistor density and performance by ensuring accurate placement and consistent dimensions of the contact structures.
Implementation Method 1
recessing the insulator material to a position below the semiconductor structures
Implementation Method 2
templated bottom-up growth or spatially confined deposition to form backside contact placeholders
Implementation Method 3
templated bottom-up growth or spatially confined deposition to form backside contact placeholders
Data Source
Figure 1
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AI summary
Devices, transistor structures, systems, and techniques are described herein related to backside contacts for nanoribbon field effect transistors formed using a backside placeholder contact. The device comprises source/drain regions (1101 and 1102), nanoribbon channels (203), a gate (206), as well as back-and front-side metallizations (1301, M0-M4, BM0-BM2). The backside placeholder contact is templated from a recessed dielectric material such as a recessed carbon hardmask. The recessed dielectric material is formed and replaced with a placeholder metal in frontside processing, and the placeholder metal is revealed and replaced from the transistor backside to form the backside contact. The interface between the backside contact (1501) and the source/drain region (1101) has a concave shape, curved inwardly in the source/drain region with a flat peripheral part, as shown in the inset.