Backside Source Contact Layout for Self-Aligned Short Prevention
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Solution Overview
Problem
Conventional methods for forming backside source/drain contacts in semiconductor devices face challenges such as electrical shorts between the gate structure and the backside contact due to imperfect photolithography overlay, leading to reduced yield and increased parasitic capacitance.
Innovation Solution
A method involving the formation of a dummy epitaxial feature in the source/drain opening, followed by a self-aligned etching process using selective etch processes to form backside contacts, which reduces the risk of damaging adjacent gate structures by ensuring precise alignment and etch selectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional photolithography overlay is used to form backside source/drain contacts, then the manufacturing process is simple, but electrical shorts occur between the gate structure and backside contact due to imperfect alignment
Solution Approach 1:
A mandrel structure is introduced as an intermediary element between the photolithography pattern and the final backside contact. The mandrel serves as a self-aligned reference that guides the formation of the contact opening, ensuring precise positioning relative to the gate structure without requiring perfect photolithography overlay. This intermediary structure mediates the alignment process and prevents electrical shorts.
Solution Approach 2:
The mandrel structure is formed in advance before the backside contact opening is created. This preliminary action establishes a precise geometric reference that subsequent etching processes can align to, ensuring that the contact opening will be correctly positioned relative to the gate structure before the actual contact formation occurs.
2Reliability
If backside contacts are formed closer to the gate structure to reduce parasitic capacitance, then electrical performance improves, but the risk of electrical shorts increases
Solution Approach 1:
The mandrel structure acts as a protective intermediary that defines the precise boundary between the backside contact and the gate structure. By using the mandrel as a self-aligned reference, the contact can be formed as close as possible to the gate structure while maintaining a safe distance defined by the mandrel geometry, thus reducing parasitic capacitance without increasing short risk.
Solution Approach 2:
The solution creates different spatial zones with different properties: the mandrel region provides precise alignment reference, the contact opening region allows close proximity to reduce capacitance, and the gate structure region maintains electrical isolation. This local differentiation of functional zones enables optimal performance while preventing shorts.
3Manufacturing precision
If multiple etching steps are used to improve alignment precision, then manufacturing complexity increases
Solution Approach 1:
The mandrel structure serves a dual function: it is both a pattern definition element from photolithography and a self-aligned reference for the backside contact opening. This self-service capability allows the same structure to perform multiple functions without requiring additional alignment steps, maintaining process simplicity while achieving high precision.
Solution Approach 2:
The mandrel is formed in advance as part of the standard photolithography process flow, establishing the alignment reference before the backside contact etching begins. This preliminary formation integrates the precision reference into the existing process sequence without adding separate alignment steps, thus improving precision without proportionally increasing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method enhances yield and reduces the likelihood of electrical shorts, improving the reliability and efficiency of backside contact formation in semiconductor devices.
Implementation Method 1
a self-aligned etching process using selective etch processes to form backside contacts
Data Source
AI summary
A semiconductor structure and a method of forming the same are provided. In an embodiment, a semiconductor structure includes an epitaxial source feature and an epitaxial drain feature, a vertical stack of channel members disposed over a backside dielectric layer, the vertical stack of channel members extending between the epitaxial source feature and the epitaxial drain feature along a direction, a gate structure wrapping around each of the vertical stack of channel members, and a backside source contact disposed in the backside dielectric layer. The backside source contact includes a top portion adjacent the epitaxial source feature and a bottom portion away from the epitaxial source feature. The top portion and the bottom portion includes a step width change along the direction.