Backside Contact Structure With Sidewall Spacers for Nanosheet FETs
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Solution Overview
Problem
Existing methods for forming nanosheet field-effect transistors (FETs) do not use a bottom dielectric insulator (BDI) layer, leading to potential damage to the gate structure and source/drain regions during substrate removal in wafer backside processing.
Innovation Solution
A semiconductor structure with backside contact formation using backside sidewall spacers, eliminating the need for a bottom dielectric insulator layer, and incorporating nanosheet FETs with alternating patterns of sidewall spacers for enhanced protection and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a bottom dielectric insulator (BDI) layer is used in existing nanosheet FET formation methods, then the gate structure and source/drain regions are protected during substrate removal, but the manufacturing process becomes more complex and additional material layers are required
Solution Approach 1:
The patent introduces backside sidewall spacers as intermediary structures formed on the backside of the substrate. These spacers serve as protective elements during substrate removal, replacing the traditional BDI layer. The spacers are formed by depositing spacer material conformally on the backside surface and then performing anisotropic etching to create sidewall structures that protect sensitive regions during subsequent processing steps.
Solution Approach 2:
The patent inverts the traditional approach by forming protective structures on the backside of the substrate rather than on the frontside. Instead of placing a BDI layer between the substrate and processing equipment, the protective function is achieved through backside sidewall spacers that are formed and then used to protect the gate and source/drain regions during frontside processing.
2Reliability
If a bottom dielectric insulator (BDI) layer is used, then substrate removal is protected, but additional material deposition and removal steps are required increasing manufacturing time
Solution Approach 1:
The backside sidewall spacers serve multiple functions simultaneously: they protect the substrate during removal, define alignment references for subsequent processing, and can serve as etch stop layers. This multi-functionality eliminates the need for separate BDI layer deposition and removal steps, streamlining the manufacturing process.
Solution Approach 2:
The protective backside sidewall spacers are formed in advance before substrate removal and frontside processing. This preliminary formation of protective structures ensures that the gate and source/drain regions are already protected when substrate removal begins, eliminating the need for post-protection steps.
3Device complexity
If no bottom dielectric insulator (BDI) layer is used, then manufacturing steps are reduced, but the gate structure and source/drain regions are vulnerable to damage during substrate removal
Solution Approach 1:
The backside sidewall spacers act as intermediary protective structures that mediate between the substrate removal process and the sensitive gate/source/drain regions. These spacers are positioned on the backside of the substrate and extend upward to protect the underlying structures during frontside processing, providing the necessary protection without requiring a traditional BDI layer.
Solution Approach 2:
The patent moves the protective function from the frontside (where BDI would be located) to the backside of the substrate. By forming protective sidewall spacers on the backside that extend upward, the protection is achieved through a different spatial dimension, avoiding the need for frontside BDI material deposition.
Data Source
AI summary
A semiconductor structure includes a source/drain region having a backside surface disposed in a backside interlayer dielectric layer, a backside contact disposed in the backside interlayer dielectric layer, wherein the backside contact is disposed on the backside surface of the source/drain region, backside sidewall spacers disposed between sidewalls of the backside interlayer dielectric layer and sidewalls of the backside contact and the backside surface of the source drain region, and a backside power rail connected to the source/drain region through the backside contact.