Backside Contact Via Materials for Low-Resistivity Semiconductor Structures
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Solution Overview
Problem
The scaling down of semiconductor integrated circuits increases complexity and conductive resistivity between conductive elements, necessitating advancements in IC materials and manufacturing processes to maintain efficiency and reduce costs.
Innovation Solution
The use of anisotropic transport materials or topological materials for conductive vias in semiconductor structures, which are formed using methods like double-patterning or multi-patterning processes, to mitigate increased resistivity and enhance charge transport properties, particularly in FinFET devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional scaling down process is used to increase functional density, then production efficiency is improved and costs are lowered, but conductive resistivity between conductive elements increases
Solution Approach 1:
The patent changes the material parameter of conductive vias from conventional metals to anisotropic transport materials or topological materials. This material parameter change results in lower resistivity values, directly addressing the worsening conductive resistivity issue while maintaining the scaling down benefits for productivity
Solution Approach 2:
The patent employs composite material structures where anisotropic transport materials or topological materials are used in conjunction with conventional semiconductor materials. This composite approach leverages the unique electrical properties of the specialized materials to reduce resistivity while integrating with existing semiconductor fabrication processes
2Productivity
If geometry size is decreased to increase functional density, then more circuits fit per chip area, but manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by introducing specialized materials specifically for conductive via regions rather than throughout the entire chip. This targeted material application addresses resistivity issues in critical interconnect regions without requiring complex manufacturing changes across the whole device structure
Solution Approach 2:
The patent exploits the anisotropic nature of the transport materials, where electrical conductivity differs along different crystallographic directions. By orienting the material's high-conductivity direction along the current flow path in vertical vias, the solution addresses resistivity through dimensional orientation rather than solely through material composition
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These materials provide lower resistivity compared to conventional metals, maintaining efficiency as the semiconductor structure is scaled down, and reduce conductive resistivity between components, thereby addressing the challenges of increased complexity and resistivity in advanced IC manufacturing.
Implementation Method 1
The conductive via includes an anisotropic transport material or a topological material
Implementation Method 2
provide lower resistivity compared to conventional metals, maintaining efficiency as the semiconductor structure is scaled down
Data Source
AI summary
A semiconductor structure includes a substrate, at least one gate electrode, a plurality of source/drain (S/D) regions, a backside contact, a first dielectric layer, and a conductive via. The at least one gate electrode is disposed in the substrate. The S/D regions is disposed in the substrate and laterally disposed aside the at least one gate electrode. The backside contact is disposed above the S/D regions and the at least one gate electrode. The first dielectric layer is disposed between the backside contact and the plurality of S/D regions and the at least one gate electrode. The conductive via is extended through the first dielectric layer to electrically connect the S/D regions and the backside contact. The conductive via includes an anisotropic transport material or a topological material.